“…In this example, the instruction executed by each CFU does not change over time, thus, one context is sufficient for storing the configuration of each multiplexer and functional unit control bits. In general, an architecture with II contexts are required to implement a schedule [16], where a context is a complete set of configuration bits needed to store the values of all multiplexer and functional unit select lines in the fabric. DRESC begins the scheduling task by attempting to schedule the dataflow graph on an architecture with II=1.…”