Extending gate dielectric scaling limit by use of nitride or oxynitride

Wang, X.W.; Shi, Ying; Ma, T.P.; Cui, G.J.; Tamagawa, T.; Golz, John; Halpen, B.L.; Schmitt, J.J.

doi:10.1109/vlsit.1995.520881

Cited by 14 publications

(4 citation statements)

References 5 publications

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“…1, voltages are applied to the silicon substrate with respect to the top Al electrode connected to ground. Three regions can be distinguished: (1) V gate < 0 (inversion condition), (2) …”

Section: Methodsmentioning

confidence: 99%

See 1 more Smart Citation

On the reliability of ZrO2 films for VLSI applications

Caputo¹,

Irrera²

2004

Microelectronics Reliability

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“…1, voltages are applied to the silicon substrate with respect to the top Al electrode connected to ground. Three regions can be distinguished: (1) V gate < 0 (inversion condition), (2) …”

Section: Methodsmentioning

confidence: 99%

“…Nitrided silicon dioxide have been proposed first [1,2]; zirconium, hafnium, lanthanides and others are currently receiving a lot of attention [3][4][5][6][7]. These feature: good chemical stability onto silicon substrate, amorphous network, large energy gap and high band offset with silicon.…”

Section: Introductionmentioning

confidence: 99%

On the reliability of ZrO2 films for VLSI applications

Caputo¹,

Irrera²

2004

Microelectronics Reliability

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“…That of SiO x N y is between 4 and 7, depending on the nitrogen concentration in the films. Encouraging results in leakage current reduction, boron diffusion control, and reliability enhancement were demonstrated by using SiO x N y to replace SiO 2 of the same EOT [7][8][9]. The leakage suppression of SiO x N y depends on the layer composition.…”

Section: High-κ Dielectric and Effective Oxide Thickness (Eot)mentioning

confidence: 99%

Atomic Layer Deposition (ALD) of Metal Gates for CMOS

Zhao

Xiang

2019

Applied Sciences

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The continuous down-scaling of complementary metal oxide semiconductor (CMOS) field effect transistors (FETs) had been suffering two fateful technical issues, one relative to the thinning of gate dielectric and the other to the aggressive shortening of channel in last 20 years. To solve the first issue, the high-κ dielectric and metal gate technology had been induced to replace the conventional gate stack of silicon dioxide layer and poly-silicon. To suppress the short channel effects, device architecture had changed from planar bulk Si device to fully depleted silicon on insulator (FDSOI) and FinFETs, and will transit to gate all-around FETs (GAA-FETs). Different from the planar devices, the FinFETs and GAA-FETs have a 3D channel. The conventional high-κ/metal gate process using sputtering faces conformality difficulty, and all atomic layer deposition (ALD) of gate stack become necessary. This review covers both scientific and technological parts related to the ALD of metal gates including the concept of effect work function, the material selection, the precursors for the deposition, the threshold voltage (Vt) tuning of the metal gate in contact with HfO2/SiO2/Si. The ALD of n-type metal gate will be detailed systematically, based mainly on the authors’ works in last five years, and the all ALD gate stacks will be proposed for the future generations based on the learning.

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“…The possibility of using silicon nitride to extend the scaling limit of gate dielectric due to nitride's lower tunneling current was first demonstrated with the Jet Vapor Deposition (JVD) technique in 1995 [10]. This technique, developed by researchers at Yale University and Jet Process Corporation, employs supersonic jets of a light carrier gas like helium to transport depositing vapor from the source to the substrate to produce different films [11,12].…”

Section: Introductionmentioning

confidence: 99%

Electrical and Physical Characterization of Ultrathin Silicon Oxynitride Gate Dielectric Films Formed by the Jet Vapor Deposition Technique

Karamcheti¹,

Watt²,

Luo³

et al. 1999

MRS Proc.

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This paper describes the electrical and physical characteristics of ultrathin Jet Vapor Deposited (JVD) Silicon Oxynitride films. Capacitance-Voltage measurements indicate an equivalent oxide thickness (EOT) of less than 2 nm, taking into account the quantum-mechanical correction. These films have leakage currents almost two orders of magnitude lower than thermal oxide of the same equivalent thickness. Measurements on NMOSFETs with 0.15 gtm of channel length demonstrate excellent electrical properties, including high drive currents (-0.5 mA/tm @ Vd=Vg-Vt=l .5 V), low sub-threshold swings (-72 mV/decade), and high transconductance (-0.36 mS/[Lm @ Vd=1.5 V). These films were also analyzed using a variety of physicochemical methods, including Total X-ray Fluorescence (TXRF), Atomic Force Microscopy (AFM), Nuclear Reaction Analysis (NRA), Low Energy (500 eV) Secondary Ion Mass Spectrometry (SIMS), and Transmission Electron Microscopy (TEM). Surface metal concentrations of less than 10"1 atoms/cm 2 were measured from the TXRF analysis. The microroughness values for these films varied between 0.15 -0.17 nm as measured by AFM. Low energy (500 eV) SIMS and NRA indicate high [N] near the top as well as throughout the bulk of the film, and a significant amount of [0] near the top of the film. High Resolution TEM pictures show a very uniform film with a physical thickness of 2.8 ± 0.1 nM, which yields an effective dielectric constant of 5.5, consistent with these types of oxynitride films.

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Extending gate dielectric scaling limit by use of nitride or oxynitride

Cited by 14 publications

References 5 publications

On the reliability of ZrO2 films for VLSI applications

On the reliability of ZrO2 films for VLSI applications

Atomic Layer Deposition (ALD) of Metal Gates for CMOS

Electrical and Physical Characterization of Ultrathin Silicon Oxynitride Gate Dielectric Films Formed by the Jet Vapor Deposition Technique

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