Extraction of via and trace model from PCB channel S-parameter data by stochastic optimization

Lee, Juyoung; Doblar, Drew

doi:10.1109/epeps.2009.5338491

2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems 2009

DOI: 10.1109/epeps.2009.5338491

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Extraction of via and trace model from PCB channel S-parameter data by stochastic optimization

Juyoung Lee

Drew Doblar

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Extraction of a lumped element, equivalent circuit model for via interconnections in 3-D packages using a single via structure with embedded capacitors

Poh

Bhattacharya

Ferguson³

et al. 2010

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)

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Extraction of via and trace model from PCB channel S-parameter data by stochastic optimization

Cited by 2 publications

References 4 publications

Extraction of a lumped element, equivalent circuit model for via interconnections in 3-D packages using a single via structure with embedded capacitors

Extraction of a lumped element, equivalent circuit model for via interconnections in 3-D packages using a single via structure with embedded capacitors

Test structure designed for vias in multi-layer package substrate

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