Fabrication and characterization of a planarized vertical-cavity surface-emitting laser by using the silicon oxide

Abstract

Articles you may be interested inBuried heterostructure vertical-cavity surface-emitting laser with semiconductor mirrors Appl. Phys. Lett. 101, 101103 (2012); 10.1063/1.4750062Multiwavelength fabrication of vertical-cavity surface-emitting lasers based on asymmetric one-dimensional photonic crystalInterpretation of polarization pinning due to scattering loss differentiation in asymmetric vertical-cavity surfaceemitting laser cavitiesIn this article, an alternative method is presented to fabricate a planar-type oxide-confined 850-nm vertical-cavity surface-emitting laser ͑VCSEL͒. The threshold voltage, threshold current, light output power, external differential quantum efficiency, emission spectrum, and dynamic response of VCSELs planarized with a silicon oxide ͑SiO x ͒ have been evaluated. These devices exhibit excellent static characteristics, including a threshold voltage ͑V th ͒ of 2.05 V corresponding to a threshold current of 0.88 mA, a minimum threshold current of 0.7 mA near 60°C, a maximum output power of 4.28 mW at 11 mA, a maximum external differential quantum efficiency ͑ ex ͒ of 43% just above threshold, and an operation temperature beyond 130°C. In addition, the transverse modes of the device initially are low-order, while high-order modes appear at elevated current levels. The fundamental transverse mode at the longest wavelength increases with injected current with a redshift of 0.49 nm/ mA due to the Joule effect. Since the thermal resistance of the VCSEL with a SiO x buried layer is less than that of device without it, the VCSEL with the buried layer displays less redshift and better performance. Finally, the VCSEL with a SiO x buried layer shows a clear eye-opening feature as operating at 2.488 Gbit/ s with a bias current of 2 mA. Further increasing the current level, the device can work at the maximum bit rate of 8 Gbit/ s and a bias current of 3.7 mA.