2010
DOI: 10.1021/nl102239q
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Fabrication and Characterization of Axially Doped Silicon Nanowire Tunnel Field-Effect Transistors

Abstract: Tunnel field-effect transistors were fabricated from axially doped silicon nanowire p-n junctions grown via the vapor-liquid-solid method. Following dry thermal oxidation to form a gate dielectric shell, the nanowires have a p-n-n(+) doping profile with an abrupt n-n(+) junction, which was revealed by scanning capacitance microscopy. The lightly doped n-segment can be inverted to p(+) by modulating the top gate bias, thus forming an abrupt gated p(+)-n(+) junction. A band-to-band tunneling current flows throug… Show more

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Cited by 82 publications
(65 citation statements)
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“…For the non-adiabatic region, a value of α = 3/2 was used. Using Equation 9, the activation energy was estimated to be ∼ 0.34 eV and 0.24 eV for ohmic and NDR regions, respectively. Figure 10b and 10c shows adiabatic conductivity vs. inverse temperatureplot for tunnel diode in the dark condition for α = 1 and α = 1.5 respectively.…”
Section: Resistance = Aementioning
confidence: 99%
See 1 more Smart Citation
“…For the non-adiabatic region, a value of α = 3/2 was used. Using Equation 9, the activation energy was estimated to be ∼ 0.34 eV and 0.24 eV for ohmic and NDR regions, respectively. Figure 10b and 10c shows adiabatic conductivity vs. inverse temperatureplot for tunnel diode in the dark condition for α = 1 and α = 1.5 respectively.…”
Section: Resistance = Aementioning
confidence: 99%
“…[1][2][3][4][5][6][7]9,10,12,13 Memory resistors can be fabricated using semiconductors and metal oxides such as Nb 2 O 5 , NiO, ZnO and TiO 2 .…”
mentioning
confidence: 99%
“…Together with these effects, higher OFF state leakage (I OFF ) and reduced I ON /I OFF ratio are thus expected for sub-65 nm conventional Si MOSFETs. Recently, interband tunneling field-effect-transistors (TFETs) [1][2][3][4][5][6][7][8][9][10] based on band-to-bandtunneling (BTBT) injection mechanism different from diffusion over a potential barrier have been proposed and studied in order to reduce SS below the diffusion limit of 60 mV/dec and reduce I OFF . Numerical simulation model of TFET devices using carbon nanotube, [1][2][3] Ge, 4 Si, [5][6][7] and III-V 8-10 materials exhibited remarkable higher transistor I ON current and steeper SS.…”
mentioning
confidence: 99%
“…It is clear that MOSFET is limited in subthreshold swing (SS) (60 mV/decade at room temperature) in recent technology (nanoscale system design) So tunnel field--effect transistor (TFET) is considered the best substitute for conventional CMOS (Zhao, et al, 2011). Enhance the current and steep subthreshold swing (below 60 mv/decade) are reliable trait as compared with MOS technology in ultralow voltage and high frequency applications (Vallett, et al, 2010;Ionescu and Riel, 2011). The method of carrier relocation is band--to--band tunneling (BTBT) (Zhu, et al, 2013) model which this phenomena betide between the source region and the channel region (Khayer and Lake, 2009).…”
Section: Introductionmentioning
confidence: 99%