We h a ve applied a simultaneous combination of scanning Kelvin probe microscopy and scanning atomic force microscopy to the problem of pro ling dopant concentrations in two dimensions in silicon microstructures. By measuring the electrochemical potential di erence which minimizes the electrostatic force between probe tip and sample surface, we estimate the work function di erence between the tip and surface. To the extent that this work function di erence is a consequence of the dopant concentration at, or near, the sample surface, we infer doping pro les from our measurement. Structures examined and presented here include contact holes, and the technologically signi cant lightly-doped drain of a metal-oxide-silicon eld-e ect transistor. Using this methodology, w e are able to distinguish relative c hanges in dopant concentration with lateral resolution less than 100 nm. Sample preparation is minimal, and measurement time is fast compared to other techniques. Our measurements have been compared to predictions based on two-and three-dimensional process and device simulation tools. The comparisons show our technique is sensitive t o c hanges in dopant concentration, from 10 15 cm ,3 to 10 20 cm ,3 , of less than ten percent at these size scales. Suggestions to resolve absolute dopant concentration are made.

Tunnel field-effect transistors were fabricated from axially doped silicon nanowire p-n junctions grown via the vapor-liquid-solid method. Following dry thermal oxidation to form a gate dielectric shell, the nanowires have a p-n-n(+) doping profile with an abrupt n-n(+) junction, which was revealed by scanning capacitance microscopy. The lightly doped n-segment can be inverted to p(+) by modulating the top gate bias, thus forming an abrupt gated p(+)-n(+) junction. A band-to-band tunneling current flows through the electrostatically doped p(+)-n(+) junction when it is reverse biased. Current-voltage measurements performed from 375 down to 4.2 K show two different regimes of tunneling current at high and low temperatures, indicating that there are both direct band-to-band and trap-assisted tunneling paths.

Perhaps never before in semiconductor microlithography has there been such an interest in the accuracy of measurement. This interest places new demands on our in-line metrology systems as well as the supporting metrology for verification. This also puts a burden on the users and suppliers of new measurement tools, which both challenge and complement existing manufacturing metrology. The metrology community needs to respond to these challenges by using new methods to assess the fab metrologies. An important part of this assessment process is the ability to obtain accepted reference measurements as a way of determining the accuracy and Total Measurement Uncertainty 1 (TMU) of an in-line critical dimension (CD). In this paper, CD can mean any critical dimension including, for example, such measures as feature height or sidewall angle. This paper describes the trade-offs of in-line metrology systems as well as the limitations of Reference Measurement Systems 2 (RMS). Many factors influence each application such as feature shape, material properties, proximity, sampling, and critical dimension. These factors, along with the metrology probe size, interaction volume, and probe type such as e-beam, optical beam, and mechanical probe, are considered. As the size of features shrinks below 100nm some of the stalwarts of reference metrology come into question, such as the electrically determined transistor gate length. The concept of the RMS is expanded to show how multiple metrologies are needed to achieve the right balance of accuracy and sampling. This is also demonstrated for manufacturing metrology. Various comparisons of CDSEM, scatterometry, AFM, cross section SEM, electrically determined CDs, and TEM are shown. An example is given which demonstrates the importance in obtaining TMU by balancing accuracy and precision for selecting manufacturing measurement strategy and optimizing manufacturing metrology. It is also demonstrated how the necessary supporting metrology will bring together formerly unlinked technology fields requiring new measurement science. The emphasis on accuracy will increase the importance and role of NIST and similar metrology organizations in supporting the semiconductor industry in this effort.

ABSTRACTmethod for characterizing the mechanical stress induced in silicon technology is described. Analysis by scanning Kelvin probe force microscopy (SKPM) coupled with finite-element (FE) mechanical strain simulations is performed. The SKPM technique detects variations in the semiconductor work function due to strain influences on the band gap. This technique is then used to analyze the strain induced by shallow trench isolation processes for electrical isolation. The SKPM measurements agree with the FE simulations qualitatively.

Three-dimensional device (FinFET) doping requirements are challenging due to fin sidewall doping, crystallinity control, junction profile control, and leakage control in the fin. In addition, physical failure analyses of FinFETs can frequently reach a “dead end” with a No Defect Found (NDF) result when channel doping issues are the suspected culprit (e.g., high Vt, low Vt, low gain, sub-threshold leakage, etc.). In new technology development, the lack of empirical dopant profile data to support device and process models and engineering has had, and continues to have, a profound negative impact on these emerging technologies. Therefore, there exists a critical need for dopant profiling in the industry to support the latest technologies that use FinFETs as their fundamental building block [1]. Here, we discuss a novel sample preparation method for cross-sectional dopant profiling of FinFET devices. Our results show that the combination of low voltage (<500eV), shallow angle (~10 degree) ion milling, dry etching, and mechanical polishing provides an adequately smooth surface (Rq<5Å) and minimizes surface amorphization, thereby allowing a strong Scanning Capacitance Microscopy (SCM) signal representative of local active dopant (carrier) concentration. The strength of the dopant signal was found to be dependent upon mill rate, electrical contact quality, amorphous layer presence and SCM probe quality. This paper focuses on a procedure to overcome critical issues during sample preparation for dopant profiling in FinFETs.