Fabrication and Performance Limits of Sub-0.1 µm Cu Interconnects

Abstract

As the on-chip interconnect linewidth and film thickness shrink below 0.1 µm, the size effect on Cu resistivity becomes important, and the electrical performance deliverable by such narrow metal lines needs to be assessed critically. From the fabrication viewpoint, it is also crucial to determine how structural parameters affect resistivity in the sub-0.1 µm feature size regime. To evaluate the scaling of resistivity with thickness, we have fabricated a series of Ta/Cu/Ta/SiO2 thin film structures with Cu thickness ranging from 1 µm to 0.02 µm. These test structures revealed a far larger (∼2.3 ×) size effect than that expected from surface scattering. We have also fabricated test structures containing 50-nm-wide Cu lines wrapped in Ta-based liners and embedded in insulating SiO2 using e-beam lithography, high-density plasma etching, ionized PVD Cu deposition, and chemical-mechanical planarization processes. Direct current (16 nA) resistance measurements from these 50-nm-wide Cu lines have also shown a higher- than-expected distribution of resistivity. Cross-sectional TEM and surface AFM observations suggest that the observed extra resistivity increase can be attributed to small grain sizes in ultra- thin Cu films and to Cu/Ta interface roughness. Monte Carlo simulations are used to quantify the extra resistivity resulting from interface roughness.

Thin, Continuous, and Conformal Copper Films by Reduction of Atomic Layer Deposited Copper Nitride

“…The curve in Figure 11 is calculated from a simple model that includes only grain-boundary scattering, see Equation 1. [19] q/q 0 = 1+1.5{R/(1 -R)}k/g…”

Growth of epitaxial Cu on MgO(001) by magnetron sputter deposition

“…Of particular interest is the electron-scattering at the surface, which contributes to the so called "size effect" [1]. The size-effect refers to a resistivity increase which becomes important when the conductor line width reaches length scales comparable to the room-temperature electron mean free path, determined by electron-phonon scattering, of 39 nm [2]. The resistivity increase represents a major challenge for the continuous device scaling in integrated circuits as specified in the International Technology Roadmap for Semiconductors [3].…”

Effect of a DC Field on Temperature Distribution in a Thin FGM Metal Line Subjected to Distributed Local Heating Sources

“…This difference may be one reason preliminary data shows deterioration of copper reliability at smaller feature sizes [4]. Copper resistivity has also been projected to increase dramatically with smaller feature size due to electron scattering from grain boundaries and conductor walls [5]. Now-a-days, pure metals are of little use in engineering applications because of demand of conflicting property requirements and thus are being replaced by various kinds of advanced materials.…”