The relaxation of patterned, compressively strained, epitaxial Si0.7Ge0.3 films transferred to borophosphorosilicate (BPSG) glass by a wafer-bonding and etch-back technique was studied as an approach for fabricating defect-free Si1−xGex relaxed films. Both the desired in-plane expansion and undesired buckling of the films concurrently contribute to the relaxation. Their relative role in the relaxation process was examined experimentally and by modeling. Using x-ray diffraction, Raman scattering and atomic force microscopy, the dynamics of in-plane expansion and buckling of Si0.7Ge0.3 islands for island sizes ranging from 10 μm×10 μm to 200 μm×200 μm for anneal temperatures between 750 and 800 °C was investigated. Lateral relaxation is favored in small and thick islands, and buckling is initially dominant in large and thin islands. Raising the temperature to lower viscosity of the oxide enhances the rate of both processes equally. For very long annealing times, however, the buckling disappeared, allowing larger, flat, and relaxed islands to be achieved. Cross-sectional transmission electron microscopy observation on a relaxed Si0.70Ge0.30 island revealed no dislocations, confirming that SiGe relaxation on BPSG is a good approach to achieve high quality relaxed SiGe.

GaN films are grown by plasma-assisted molecular-beam epitaxy on SiC substrates. The width of the x-ray rocking curve for the (101̄2) reflection exhibits a distinct minimum for Ga/N flux ratios which are only slightly greater than unity. Correlated with this minimum, the surface morphology is somewhat rough, with a hill and valley topography. Based on transmission electron micrographs, the reduction in rocking curve width is attributed to enhanced annihilation of edge dislocations due to their tendency to cluster at topographic valleys.

Plasma-based ashing of photoresist masks after pattern transfer is a common processing step in the fabrication of integrated circuits. In this work we investigated damage mechanisms of nanoporous ultra low k (ULK) materials with different overall porosities due to the ashing process. Oxygen-, nitrogen- and hydrogen-based photoresiststripping using direct and remote plasma processes were examined. Ellipsometry, x-ray photoelectron spectroscopy, secondary ion mass spectroscopy, and transmission electron microscopy were utilized to study the damage layer thickness, physical (pore morphology), and chemical modifications of the nanoporous silica thin films after exposure to the O2-, N2- or H2-based ashing processes. As a result of the plasma exposure, carbon groups in nanoporous silica can be removed from the ULK layers which is also accompanied by material densification. We find severe ashing damage of ULK materials after O2-based ashing using both direct and remote discharges. N2 and H2 discharges also damage ultralow k materials for direct plasma ashing processes which are accompanied by low energy ion bombardment of the substrates. The introduction rate and degree of the ULK materials modifications correlates with the overall porosity. We show that the pore interconnectivity is one of the key parameters that determine ashing damage. ULK damage is greatly reduced for remote N2 or H2 discharges, but the resist removal rates are impractically low if the substrate is at room temperature. We show that both acceptable photoresist stripping rates and ULK damage levels can be achieved for remote H2 plasma ashing processes if the substrate temperature is 250°C and higher.

As the on-chip interconnect linewidth and film thickness shrink below 0.1 µm, the size effect on Cu resistivity becomes important, and the electrical performance deliverable by such narrow metal lines needs to be assessed critically. From the fabrication viewpoint, it is also crucial to determine how structural parameters affect resistivity in the sub-0.1 µm feature size regime. To evaluate the scaling of resistivity with thickness, we have fabricated a series of Ta/Cu/Ta/SiO2 thin film structures with Cu thickness ranging from 1 µm to 0.02 µm. These test structures revealed a far larger (∼2.3 ×) size effect than that expected from surface scattering. We have also fabricated test structures containing 50-nm-wide Cu lines wrapped in Ta-based liners and embedded in insulating SiO2 using e-beam lithography, high-density plasma etching, ionized PVD Cu deposition, and chemical-mechanical planarization processes. Direct current (16 nA) resistance measurements from these 50-nm-wide Cu lines have also shown a higher- than-expected distribution of resistivity. Cross-sectional TEM and surface AFM observations suggest that the observed extra resistivity increase can be attributed to small grain sizes in ultra- thin Cu films and to Cu/Ta interface roughness. Monte Carlo simulations are used to quantify the extra resistivity resulting from interface roughness.