Fabrication-Time and Run-Time Fault-Tolerant Array Processors Using Single-Track Switches

Kung, Sun‐Yuan; Jean, S. N.; Chang, C. W.

doi:10.1007/978-1-4615-6799-8_25

Cited by 4 publications

(1 citation statement)

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“…The necessary and sufficient condition for the reconfiurability established in this paper proves to be very useful. It leads t o reconfiguration algorithms: one adopts global control for the (fabrication-time) yield enhancement and the other is a distributed scheme for the (run-time) reliability improvement [ 5 ] . The fabrication-time algorithm can systematically enumerate all the placement possibilities.…”

Section: Resultsmentioning

confidence: 99%

Necessary and sufficient conditions for reconfigurability in single-track switch WSI arrays

Jean

Kung

[1989] Proceedings International Conference on Wafer Scale Integration

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This paper addresses the important fault-tolerance issue for arrays of large number of processors. An array grid model based on single-track switches is adopted. Single track requires less hardware overhead and suffers less from possible faults on switches. More significantly, we are able to establish a very critical necessary and sufficient condition for the reconfigumbiliiy of such array. This is used as the theoretical footing for the reconfiguration algorithm, usin5 global control, for the (fabrication-time) yield enhancement. Our approach can also effectively deal with failures of switches/wires/connections to obtain a solution. The simulations conducted indicate that a significant yield enhancement can be achieved.

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Section: Resultsmentioning

confidence: 99%

Necessary and sufficient conditions for reconfigurability in single-track switch WSI arrays

Jean

Kung

[1989] Proceedings International Conference on Wafer Scale Integration

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Efficient and optimal fault-to-spare assignments in doubly fault tolerant arrays

Shrivastava

Melhem

[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems

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Reconfiguration algorithm for fault-tolerant arrays with minimum number of dangerous processors

Chen

Kikuno

et al.

[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium

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Fabrication-Time and Run-Time Fault-Tolerant Array Processors Using Single-Track Switches

Cited by 4 publications

References 5 publications

Necessary and sufficient conditions for reconfigurability in single-track switch WSI arrays

Necessary and sufficient conditions for reconfigurability in single-track switch WSI arrays

Efficient and optimal fault-to-spare assignments in doubly fault tolerant arrays

Reconfiguration algorithm for fault-tolerant arrays with minimum number of dangerous processors

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