Necessary and sufficient conditions for reconfigurability in single-track switch WSI arrays

Abstract

This paper addresses the important fault-tolerance issue for arrays of large number of processors. An array grid model based on single-track switches is adopted. Single track requires less hardware overhead and suffers less from possible faults on switches. More significantly, we are able to establish a very critical necessary and sufficient condition for the reconfigumbiliiy of such array. This is used as the theoretical footing for the reconfiguration algorithm, usin5 global control, for the (fabrication-time) yield enhancement. Our approach can also effectively deal with failures of switches/wires/connections to obtain a solution. The simulations conducted indicate that a significant yield enhancement can be achieved.