1998
DOI: 10.1116/1.589937
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Facet investigation in selective epitaxial growth of Si and SiGe on (001) Si for optoelectronic devices

Abstract: The facet evolution and growth rate of Si on {hkl} facets were investigated in the temperature range 700–850 °C using multilayer structures with thick Si and very thin SiGe markers prepared by selective epitaxial growth using low pressure chemical vapor deposition. The most stable facet, observed at all temperatures, is the high index plane {113}. It is the dominant facet up to the top of all mesas (∼1μm thick). Even at the corners of square dots steep {113} facets developed [angle of 72° with the (001) plane]… Show more

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Cited by 65 publications
(36 citation statements)
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“…[24][25][26][27] The side facets of the island are at angles of 29.3 to the (111) growth plane, which corresponds to {113} surfaces. As the growth rate on {113} is higher than that for the (111) surface, 28 subsequent growth on {113} will lead to the HT Ge layer being deposited in-between the islands faster than on the top (111) surface and should eventually lead to a smoother layer. The islanding of the Ge layer also leads to "trenches" in the Si substrate between the Ge islands.…”
Section: Growth Mechanism On (111)mentioning
confidence: 99%
“…[24][25][26][27] The side facets of the island are at angles of 29.3 to the (111) growth plane, which corresponds to {113} surfaces. As the growth rate on {113} is higher than that for the (111) surface, 28 subsequent growth on {113} will lead to the HT Ge layer being deposited in-between the islands faster than on the top (111) surface and should eventually lead to a smoother layer. The islanding of the Ge layer also leads to "trenches" in the Si substrate between the Ge islands.…”
Section: Growth Mechanism On (111)mentioning
confidence: 99%
“…In an earlier study we have demonstrated that the growth rate of the facets is 0.5-0.7 times lower than the growth rate along ͓001͔ directions. 12 Thereby we have simulated the j -V characteristics ͑j-current density͒ and we found that the spacer thickness ͑the layer between the island layer and the p ϩ contact, see Table I͒ is a critical parameter. Figure 3͑b͒ shows a curve corresponding to a spacer of 28 nm, which should correspond to the current flow across the ͑001͒ part of the mesa.…”
Section: Diode Characteristicsmentioning
confidence: 99%
“…The facet formation is originated either when the crystal will minimize its free energy (to a thermodynamic equilibrium) or when the growth in certain crystal orientations is controlled by adsorbed species or atoms (kinetics limitations, in chemical vapor deposition) [28][29][30]. For CMOS application, SEG SiGe layers have been applied both as stressor material and for elevating the source/drain.…”
Section: Facet Formation In Seg Of Si and Sigementioning
confidence: 99%
“…Vescan et al [29] demonstrates an extended study of the {hkl} facet evolution of Si/SiGe multi-layers in the growth temperature range of 700-850°C. It is shown that the {113} and {110} facet plane are the most stable and dominant for the growth of *1 lm thick layers.…”
Section: Facet Formation In Seg Of Si and Sigementioning
confidence: 99%