2015 11th European Dependable Computing Conference (EDCC) 2015
DOI: 10.1109/edcc.2015.28
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FAIL*: An Open and Versatile Fault-Injection Framework for the Assessment of Software-Implemented Hardware Fault Tolerance

Abstract: Due to voltage and structure shrinking, the influence of radiation on a circuit's operation increases, resulting in future hardware designs exhibiting much higher rates of soft errors. Software developers have to cope with these effects to ensure functional safety. However, software-based hardware fault tolerance is a holistic property that is tricky to achieve in practice, potentially impaired by every single design decision.We present FAIL*, an open and versatile architecture-level fault-injection (FI) frame… Show more

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Cited by 53 publications
(16 citation statements)
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“…To evaluate the fault containment within the kernel execution, we further recorded an SDC in case of violated integrity. Both SDC detection mechanisms were realized externally by the FAIL* fault-injection framework [47] without influencing the runtime behavior of the systems under test. Since FAIL* has the most mature support for IA-32, we choose this architecture as our evaluation platform.…”
Section: Discussionmentioning
confidence: 99%
“…To evaluate the fault containment within the kernel execution, we further recorded an SDC in case of violated integrity. Both SDC detection mechanisms were realized externally by the FAIL* fault-injection framework [47] without influencing the runtime behavior of the systems under test. Since FAIL* has the most mature support for IA-32, we choose this architecture as our evaluation platform.…”
Section: Discussionmentioning
confidence: 99%
“…2) Techniques that employ error injections. While typically slower than the previous group, these techniques employ error injections at different hardware and software abstractions [18,24,31,44,54,64,65,91,109,122]. Some rely predominantly on statistical error injections for vulnerability analysis [25,41,60,62,118].…”
Section: Related Workmentioning
confidence: 99%
“…Prior work in resiliency analysis imposes a significant trade-off between speed and accuracy -statistical analyses based on dynamic error-free execution traces or static code [34,68,78,80,113] are unable to precisely model error propagation paths; randomized error injection campaigns [18,54,64,109,122] provide only statistical information and are unable to predict resilience for code portions where errors were not injected; and more systematic and comprehensive error-injection techniques [49,107,117] precisely identify SDC-causing instructions but are much slower than the previous techniques. Section 7 describes prior work in more detail.…”
Section: Introductionmentioning
confidence: 99%
“…According to Barbosa et al [23], the pre-injection analysis reduced the fault space two orders of magnitude for the registers and four to five orders of magnitude for the memory locations. Tools such as GOOFI-2 [12] and FAIL* [8] use the inject-on-read fault injection technique.…”
Section: Improving Efficiencymentioning
confidence: 99%
“…Several fault injection techniques have been proposed in the past decades; they can be categorized into simulationbased techniques [4] [5] [6] [7] [8], software-implemented techniques [9] [10] [11] [12], hardware-based techniques [13] [14] [15], and test port-based techniques [8] [12] [16] [17].…”
Section: Introductionmentioning
confidence: 99%