2019
DOI: 10.1016/j.vlsi.2018.03.016
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Failure probability of a FinFET-based SRAM cell utilizing the most probable failure point

Abstract: Application requirements along with the unceasing demand for ever-higher scale of device integration, has driven technology towards an aggressive downscaling of transistor dimensions. This development is confronted with variability challenges, mainly the growing susceptibility to time-zero and timedependent variations. To model such threats and estimate their impact on a system's operation, the reliability community has focused largely on Monte Carlo-based simulations and methodologies. When assessing yield an… Show more

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