Fast 3D ZO CRS Stack – An FPGA Implementation of an Optimization Based on the Simultaneous Estimate of Eight Parameters

Marchetti, Paolo; Oriato, Diego; Pell, Oliver; Cristini, Antonio; Theis, Doug

doi:10.3997/2214-4609.201400929

Cited by 10 publications

(14 citation statements)

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“…The final implementation gives a speedup of approximately 230x compared to a single core for land datasets and 190x for marine datasets [5], approximately 30x greater performance/W.…”

Section: Crs Seismic Trace Stackingmentioning

confidence: 98%

“…We have developed dataflow accelerators for a range of scientific applications in commercial use (for example: [6,4,7,5,8,3]). In this section we'll briefly discuss one example application.…”

Section: Real World Impactmentioning

confidence: 99%

“…CRS stacking [5] is an algorithm used to process seismic survey data to compute zero-offset traces. These can be easily computed from the input data given 8 parameters to the CRS equation, however the values for these parameters.…”

Section: Crs Seismic Trace Stackingmentioning

confidence: 99%

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Surviving the end of frequency scaling with reconfigurable dataflow computing

Pell

Mencer

2011

SIGARCH Comput. Archit. News

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Over the past decade x86 processors have come to dominate the world's largest supercomputers. However in the future conventional multicore processors are unlikely to be able to deliver the necessary performance per $ and per W to achieve exascale performance. Heterogeneous computing is emerging as a powerful alternative to conventional multi-core to help address these challenges. In this paper we describe our approach to Maximum Performance Computing -building applicationspecific computers which complement conventional x86 processors with high performance dataflow engines implemented on FPGA to provide 10-100x improvements in performance and performance/W. We describe the MaxCompiler programming system which allows software engineers to create dataflow engines optimized for their particular applications, and discuss an example application that has been accelerated using this methodology.

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“…The final implementation gives a speedup of approximately 230x compared to a single core for land datasets and 190x for marine datasets [5], approximately 30x greater performance/W.…”

Section: Crs Seismic Trace Stackingmentioning

confidence: 98%

Section: Real World Impactmentioning

confidence: 99%

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Surviving the end of frequency scaling with reconfigurable dataflow computing

Pell

Mencer

2011

SIGARCH Comput. Archit. News

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“…For the current trace, the memory addresses of the data accesses are calculated for each sample-NMO velocity pair and kept in the k1 array (line [13][14][15]. en, the maximum and minimum memory address in k1 array is identi ed (line [16][17][18] and used to determine the memory range (len th) of data accesses (line 19). e data within the memory range is copied to LDM at one time through DMA operation (line 20).…”

Section: 32mentioning

confidence: 99%

“…Compared to the unoptimized OpenACC implementation, the netuning technique can obtain a signi cant speedup. In addition to the GPU, there is also research work [17] a empts to optimize seismic processing on dedicated accelerating device such as FPGA.…”

Section: Introductionmentioning

confidence: 99%

Massively Scaling Seismic Processing on Sunway TaihuLight Supercomputer

Yang

Luan

et al. 2020

IEEE Trans. Parallel Distrib. Syst.

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Common Midpoint (CMP) and Common Re ection Surface (CRS) are widely used methods for improving the signal-to-noise ratio in the eld of seismic processing. ese methods are computationally intensive and require high performance computing. is paper optimizes these methods on the Sunway many-core architecture and implements large-scale seismic processing on the Sunway Taihulight supercomputer. We propose the following three optimization techniques: 1) we propose a so ware cache method to reduce the overhead of memory accesses, and share data among CPEs via the register communication; 2) we re-design the semblance calculation procedure to further reduce the overhead of memory accesses; 3) we propose a vectorization method to improve the performance when processing the small volume of data within short loops. e experimental results show that our implementations of CMP and CRS methods on Sunway achieve 3.50× and 3.01× speedup on average compared to the-state-of-the-art implementations on CPU. In addition, our implementation is capable to run on more than one million cores of Sunway TaihuLight with good scalability.

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CRS theory based on a data-driven homeomorphism

Bonomi

2017

J. Geophys. Eng.

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Fast 3D ZO CRS Stack – An FPGA Implementation of an Optimization Based on the Simultaneous Estimate of Eight Parameters

Cited by 10 publications

References 0 publications

Surviving the end of frequency scaling with reconfigurable dataflow computing

Surviving the end of frequency scaling with reconfigurable dataflow computing

Massively Scaling Seismic Processing on Sunway TaihuLight Supercomputer

CRS theory based on a data-driven homeomorphism

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