2020 IEEE International Reliability Physics Symposium (IRPS) 2020
DOI: 10.1109/irps45951.2020.9129351
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Fast & Accurate Methodology for Aging Incorporation in Circuits using Adaptive Waveform Splitting (AWS)

Abstract: Fig. 1 Three workload profiles (cases -A, B, C) applied to a transistor under NBTI stress and the corresponding normalized degradation. During active mode, the frequency (=1GHz) and DF (=0.5) are fixed in all cases.

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Cited by 2 publications
(6 citation statements)
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“…Aging related degradation mechanisms like NBTI are strongly a function of workload/activity pattern at the gate input of the transistor due to the observed recovery effects [4], [13]. In [10], an Adaptive Workload Splitting (AWS) algorithm and a long-term extrapolation methodology were proposed for fast calculation of NBTI degradation due to an arbitrary nonuniform activity pattern with excellent accuracy. It was also demonstrated in [10] at block level that, timing path violations could be minimized using these techniques.…”
Section: A the Proposed Workload Dependent Aging Aware Design Flowmentioning
confidence: 99%
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“…Aging related degradation mechanisms like NBTI are strongly a function of workload/activity pattern at the gate input of the transistor due to the observed recovery effects [4], [13]. In [10], an Adaptive Workload Splitting (AWS) algorithm and a long-term extrapolation methodology were proposed for fast calculation of NBTI degradation due to an arbitrary nonuniform activity pattern with excellent accuracy. It was also demonstrated in [10] at block level that, timing path violations could be minimized using these techniques.…”
Section: A the Proposed Workload Dependent Aging Aware Design Flowmentioning
confidence: 99%
“…In [10], an Adaptive Workload Splitting (AWS) algorithm and a long-term extrapolation methodology were proposed for fast calculation of NBTI degradation due to an arbitrary nonuniform activity pattern with excellent accuracy. It was also demonstrated in [10] at block level that, timing path violations could be minimized using these techniques. We utilize these schemes in this paper, in order to evaluate the PPA gains on a full chip, implemented using industry-standard EDA tool flow.…”
Section: A the Proposed Workload Dependent Aging Aware Design Flowmentioning
confidence: 99%
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