Proceedings of the 27th International Conference on Compiler Construction 2018
DOI: 10.1145/3178372.3179501
|View full text |Cite
|
Sign up to set email alerts
|

Fast and flexible instruction selection with constraints

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

0
2
0

Year Published

2020
2020
2021
2021

Publication Types

Select...
2

Relationship

0
2

Authors

Journals

citations
Cited by 2 publications
(2 citation statements)
references
References 21 publications
0
2
0
Order By: Relevance
“…Similarly to ODS, DRR is a DSL embedded into the TableGen language. DRR expresses source and target DAG patterns along with constraints (including dynamic constraints [49]) and benefits for pattern prioritization. Patterns can capture and reuse arguments of an Op.…”
Section: Declarative Rewritesmentioning
confidence: 99%
See 1 more Smart Citation
“…Similarly to ODS, DRR is a DSL embedded into the TableGen language. DRR expresses source and target DAG patterns along with constraints (including dynamic constraints [49]) and benefits for pattern prioritization. Patterns can capture and reuse arguments of an Op.…”
Section: Declarative Rewritesmentioning
confidence: 99%
“…Extending, formalizing, and verifying the rewriting logic automatically would be an important next step [9,27]. On the backend side, MLIR's DDR has an analogue to LLVM's instruction selection infrastructure, supporting extensible operations with multi-result patterns and specification as constraints [49].…”
Section: Related Workmentioning
confidence: 99%