Faster remainder by direct computation: Applications to compilers and software libraries

Abstract

Summary On common processors, integer multiplication is many times faster than integer division. Dividing a numerator n by a divisor d is mathematically equivalent to multiplication by the inverse of the divisor (n/d=n∗1/d). If the divisor is known in advance, or if repeated integer divisions will be performed with the same divisor, it can be beneficial to substitute a less costly multiplication for an expensive division. Currently, the remainder of the division by a constant is computed from the quotient by a multiplication and a subtraction. However, if just the remainder is desired and the quotient is unneeded, this may be suboptimal. We present a generally applicable algorithm to compute the remainder more directly. Specifically, we use the fractional portion of the product of the numerator and the inverse of the divisor. On this basis, we also present a new and simpler divisibility algorithm to detect nonzero remainders. We also derive new tight bounds on the precision required when representing the inverse of the divisor. Furthermore, we present simple C implementations that beat the optimized code produced by state‐of‐the‐art C compilers on recent x64 processors (eg, Intel Skylake and AMD Ryzen), sometimes by more than 25%. On all tested platforms, including 64‐bit ARM and POWER8, our divisibility test functions are faster than state‐of‐the‐art Granlund‐Montgomery divisibility test functions, sometimes by more than 50%.

Number parsing at a gigabyte per second

“…• When q ≥ 0, we have m = w × 5 q × 2 q × 2 −p so that m is divisible by 5 q . In the 64-bit case, we have that m < 2 53 ; and in the 32-bit case, we have that m < 2 24 . Thus we have, respectively, 5 q < 2 53 and 5 q < 2 24 .…”

“…In the 64-bit case, we have that m < 2 53 ; and in the 32-bit case, we have that m < 2 24 . Thus we have, respectively, 5 q < 2 53 and 5 q < 2 24 . These inequalities become q ≤ 22 and q ≤ 10.…”

“…The single-precision floating-point numbers are similar but span 32 bits (binary32). They are binary floating-point numbers where the 24-bit significand m is in the interval [2 23 , 2 24 )-considered as value in [1,2) after virtually dividing name exponent bits significand (stored) decimal digits (exact) binary64 11 bits 53 bits (52 bits) 15 (17) binary32 8 bits 24 bits (23 bits) 6 (9) TA B L E 2 Common IEEE-754 binary floating-point numbers: 64 bits (binary64) and 32 bits (binary32). A single bit is reserved for the sign in all cases.…”

“…2 In this manner, we can immediately convert a decimal number to a 64-bit floating-point number when it can be written as w × 10 q with −22 ≤ q ≤ 22 and w ≤ 2 53 . We can extend Clinger's fast approach to 32-bit floating-point numbers with the conditions −10 ≤ q ≤ 10 and w ≤ 2 24 .…”

“…A mid-point between two floating-point numbers, m × 2 p and (m + 1) × 2 p , can be written as (2m + 1) × 2 p−1 . Assume that both numbers m × 2 p and (m + 1) × 2 p can be represented exactly using a standard floating-point type: for 64-bit floating point numbers, it implies that m + 1 < 2 53 ; for 32-bit numbers it implies m + 1 < 2 24 . We only need rounding if (2m + 1) × 2 p−1 cannot be represented.…”