FastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA

Hussain, Shehzeen; Javaheripi, Mojan; Neekhara, Paarth; Kastner, Ryan; Koushanfar, Farinaz

doi:10.1109/iccad45719.2019.8942122

Cited by 20 publications

(8 citation statements)

References 20 publications

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“…Additionally, the dimensionality reduction and restoring components in the feature analyzer are realized using MVMs with weight matrices , 2 R ;⇥A and , 2 R A ⇥; , respectively, where ; is the dimensionality of the input and A is the SVD rank. We devise an FPGA core for MVM and vector addition, realized using DSP blocks with Multiplication Accumulation (MAC) functionality [17,31]. Figure 8 presents the high-level schematic of CLEANN vector-matrix multiplication.…”

Section: Cleann Hardwarementioning

confidence: 99%

CleaNN

Javaheripi

Samragh

Fields

et al. 2020

Proceedings of the 39th International Conference on Computer-Aided Design

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Section: Cleann Hardwarementioning

confidence: 99%

CleaNN

Javaheripi

Samragh

Fields

et al. 2020

Proceedings of the 39th International Conference on Computer-Aided Design

Self Cite

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“…Additionally, the dimensionality reduction and restoring components in the feature analyzer are realized using MVMs with weight matrices W ∈ R l ×r and W ∈ R r ×l , respectively, where l is the dimensionality of the input and r is the SVD rank. We devise an FPGA core for MVM and vector addition, realized using DSP blocks with Multiplication Accumulation (MAC) functionality [17,31]. Figure 8 presents the high-level schematic of CLEANN vector-matrix multiplication.…”

Section: Cleann Hardwarementioning

confidence: 99%

CLEANN: Accelerated Trojan Shield for Embedded Neural Networks

Javaheripi,

Samragh,

Fields

et al. 2020

Preprint

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We propose CLEANN, the first end-to-end framework that enables online mitigation of Trojans for embedded Deep Neural Network (DNN) applications. A Trojan attack works by injecting a backdoor in the DNN while training; during inference, the Trojan can be activated by the specific backdoor trigger. What differentiates CLEANN from the prior work is its lightweight methodology which recovers the ground-truth class of Trojan samples without the need for labeled data, model retraining, or prior assumptions on the trigger or the attack. We leverage dictionary learning and sparse approximation to characterize the statistical behavior of benign data and identify Trojan triggers. CLEANN is devised based on algorithm/hardware co-design and is equipped with specialized hardware to enable efficient real-time execution on resource-constrained embedded platforms. Proof of concept evaluations on CLEANN for the state-of-the-art Neural Trojan attacks on visual benchmarks demonstrate its competitive advantage in terms of attack resiliency and execution overhead.

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“…As convolutional neural networks (CNN) finding their way more and more into a wide range of vision-based applications, there has been a significant focus on realizing low power custom hardware accelerators to attain their services on the edge/remote devices [ 1 , 2 , 3 , 4 ]. However, CNNs are computationally intensive, consuming vast amounts of dynamic power and computational resources [ 5 ].…”

Section: Introductionmentioning

confidence: 99%

Towards an Efficient CNN Inference Architecture Enabling In-Sensor Processing

Pantho

Bhowmik

Bobda

2021

Sensors

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The astounding development of optical sensing imaging technology, coupled with the impressive improvements in machine learning algorithms, has increased our ability to understand and extract information from scenic events. In most cases, Convolution neural networks (CNNs) are largely adopted to infer knowledge due to their surprising success in automation, surveillance, and many other application domains. However, the convolution operations’ overwhelming computation demand has somewhat limited their use in remote sensing edge devices. In these platforms, real-time processing remains a challenging task due to the tight constraints on resources and power. Here, the transfer and processing of non-relevant image pixels act as a bottleneck on the entire system. It is possible to overcome this bottleneck by exploiting the high bandwidth available at the sensor interface by designing a CNN inference architecture near the sensor. This paper presents an attention-based pixel processing architecture to facilitate the CNN inference near the image sensor. We propose an efficient computation method to reduce the dynamic power by decreasing the overall computation of the convolution operations. The proposed method reduces redundancies by using a hierarchical optimization approach. The approach minimizes power consumption for convolution operations by exploiting the Spatio-temporal redundancies found in the incoming feature maps and performs computations only on selected regions based on their relevance score. The proposed design addresses problems related to the mapping of computations onto an array of processing elements (PEs) and introduces a suitable network structure for communication. The PEs are highly optimized to provide low latency and power for CNN applications. While designing the model, we exploit the concepts of biological vision systems to reduce computation and energy. We prototype the model in a Virtex UltraScale+ FPGA and implement it in Application Specific Integrated Circuit (ASIC) using the TSMC 90nm technology library. The results suggest that the proposed architecture significantly reduces dynamic power consumption and achieves high-speed up surpassing existing embedded processors’ computational capabilities.

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FastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA

Cited by 20 publications

References 20 publications

CleaNN

CleaNN

CLEANN: Accelerated Trojan Shield for Embedded Neural Networks

Towards an Efficient CNN Inference Architecture Enabling In-Sensor Processing

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