Fault Cryptanalysis and the Shrinking Generator

Gomułkiewicz, Marcin; Kutyłowski, Mirosław; Wlaź, Paweł

doi:10.1007/11764298_6

Cited by 3 publications

(2 citation statements)

References 11 publications

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“…Other attacks against the shrinking generator have been designed in the literature. For example, in [18], the authors proposed two fault cryptoanalysis. In that work, the attacker is supposed to have a device implementing the shrinking generator and can use it freely.…”

Section: Other Attacks Over the Shrinking Generatormentioning

confidence: 99%

Linearity in decimation-based generators: an improved cryptanalysis on the shrinking generator

2018

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Decimation-based sequence generators are a class of non-linear cryptographic generators designed to be used in hardware implementations. An inherent characteristic of such generators is that their output sequences are interleaved sequences. This profitable characteristic can be used in the cryptanalysis of those generators. In this work, emphasis is on the most representative decimation-based generator, the shrinking generator, which has been cryptanalyzed just by solving linear equation systems. Compared with previous cryptanalysis, computational complexity and intercepted sequence requirements are dramatically reduced. Although irregularly decimated generators have been conceived and designed as non-linear sequence generators, in practice they can be easily analyzed in terms of simple linear structures.

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Section: Other Attacks Over the Shrinking Generatormentioning

confidence: 99%

Linearity in decimation-based generators: an improved cryptanalysis on the shrinking generator

2018

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“…This model tries to reflect a situation in which the cryptanalyst is in possession of the physical device, and the faults are transient rather than permanent. We adapt the methods in [15,18] to Mixer. Assume that the cryptanalyst has a device implementing Mixer and can use it freely.…”

Section: Fault Attackmentioning

confidence: 99%

Mixer–a new stream cipher

Kanso

2008

Journal of Discrete Mathematical Sciences and Cryptography

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In this paper, we propose a new keystream generator, intended for hardware implementation, called Mixer. The proposed generator is a combination of the filtering model and the control model. The design is simple and scalable, based on two binary feedback shift registers (FSRs) interconnected such that one FSR filtered by a non-linear Boolean function controls the clocking and the output of the other FSR. Mixer takes a 128-bit secret key and a 64-bit public initialization vector IV as an input to produce a keystream. It has been designed to produce keystream sequences with guaranteed randomness properties such as large period, high linear complexity, good statistical properties, and is resistant to well known types of attacks. No attack faster than exhaustive key search has been found.

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