Fault Isolation of MOL and FEOL Buried Defects Using Conductive Atomic Force Microscopy as a Complement to Passive Voltage Contrast Imaging

Abstract

Atomic force microscopy (AFM) methods have provided a wealth of knowledge into the topographic, electrical, mechanical, magnetic, and electrochemical properties of surfaces and materials at the micro- and nanoscale over the last several decades. More specifically, the application of conductive AFM (CAFM) techniques for failure analysis can provide a simultaneous view of the conductivity and topographic properties of the patterned features. As CMOS technology progresses to smaller and smaller devices, the benefits of CAFM techniques have become apparent [1-3]. Herein, we review several cases in which CAFM has been utilized as a fault-isolation technique to detect middle of line (MOL) and front end of line (FEOL) buried defects in 20nm technologies and beyond.

How Many Microscopies Does It Take to Get to the Root Cause of the Fail? Sample Prep, Imaging, and In-Situ Analysis for Integrated Circuit Failure Analysis at the 14nm Node

“…Electrical atomic force microscopy (AFM) methods such as conductive AFM and SCM are commonly used in the analysis of transistor level fails for die level fault isolation. [3][4] Further analysis using SEM-based nanoprobing allows the analyst to test the electrical characteristics of each individual transistor.…”