Fault tolerance for remote memory access programming models

Besta, Maciej; Hoefler, Torsten

doi:10.1145/2600212.2600224

Cited by 34 publications

(43 citation statements)

References 66 publications

(182 reference statements)

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“…Recent predictions about mean time between failures (MTBF) of large-scale systems indicate failures every few hours [9]. Fault tolerance can be achieved with various mechanisms.…”

Section: Enabling Incremental Checkpointingmentioning

confidence: 99%

“…Fault tolerance can be achieved with various mechanisms. In checkpoint/restart [9] all processes synchronize and record their state to memories or disks. Traditional checkpointing schemes record the same amount of data during every checkpoint.…”

Section: Enabling Incremental Checkpointingmentioning

confidence: 99%

“…Our incremental checkpointing mechanism for tracking data modifications is orthogonal to the details of synchronization and recording; one could use any available scheme [9].…”

Section: Enabling Incremental Checkpointingmentioning

confidence: 99%

“…Another fault tolerance mechanism for RMA is uncoordinated checkpointing combined with logging of puts and gets where the crashed processes repeat their work and replay puts and gets that modified their state before the failure; these puts and gets are logged during the application runtime [9]. While logging puts is simple and does not impact performance, logging gets wastes network bandwidth because it requires transferring additional data [9].…”

Section: Reducing the Overheads Of Loggingmentioning

confidence: 99%

“…While logging puts is simple and does not impact performance, logging gets wastes network bandwidth because it requires transferring additional data [9]. We now describe this issue and propose a solution based on AA.…”

Section: Reducing the Overheads Of Loggingmentioning

confidence: 99%

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Active Access

Besta

Hoefler

2015

Proceedings of the 29th ACM on International Conference on Supercomputing

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Remote memory access (RMA) is an emerging highperformance programming model that uses RDMA hardware directly. Yet, accessing remote memories cannot invoke activities at the target which complicates implementation and limits performance of data-centric algorithms. We propose Active Access (AA), a mechanism that integrates well-known active messaging (AM) semantics with RMA to enable high-performance distributed data-centric computations. AA supports a new programming model where the user specifies handlers that are triggered when incoming puts and gets reference designated addresses. AA is based on a set of extensions to the Input/Output Memory Management Unit (IOMMU), a unit that provides high-performance hardware support for remapping I/O accesses to memory. We illustrate that AA outperforms existing AM and RMA designs, accelerates various codes such as distributed hashtables or logging schemes, and enables new protocols such as incremental checkpointing for RMA. We also discuss how extended IOMMUs can support a virtualized global address space in a distributed system that offers features known from on-node memory virtualization. We expect that AA and other IOMMU features can enhance the design of HPC operating and runtime systems in large computing centers.

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“…Recent predictions about mean time between failures (MTBF) of large-scale systems indicate failures every few hours [9]. Fault tolerance can be achieved with various mechanisms.…”

Section: Enabling Incremental Checkpointingmentioning

confidence: 99%

Section: Enabling Incremental Checkpointingmentioning

confidence: 99%

“…Our incremental checkpointing mechanism for tracking data modifications is orthogonal to the details of synchronization and recording; one could use any available scheme [9].…”

Section: Enabling Incremental Checkpointingmentioning

confidence: 99%

Section: Reducing the Overheads Of Loggingmentioning

confidence: 99%

Section: Reducing the Overheads Of Loggingmentioning

confidence: 99%

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Besta

Hoefler

2015

Proceedings of the 29th ACM on International Conference on Supercomputing

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In‐memory integration of existing software components for parallel adaptive unstructured mesh workflows

Smith

Granzow

Diamond

et al. 2018

Concurrency and Computation

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Reliable mesh-based simulations are needed to solve complex engineering problems. Mesh adaptivity can increase reliability by reducing discretization errors but requires multiple software components to exchange information. Often, components exchange information by reading and writing a common file format. This file-based approach becomes a problem on massively parallel computers where filesystem bandwidth is a critical performance bottleneck. Our approach using data streams and component interfaces avoids the filesystem bottleneck. In this paper, we present these techniques and their use for coupling mesh adaptivity to the PHASTA computational fluid dynamics solver, the Albany multi-physics framework, and the Omega3P linear accelerator frequency analysis applications. Performance results are reported on up to 16,384 cores of an Intel Knights Landing-based system. KEYWORDSin-memory, mesh adaptation, parallel, unstructured mesh, workflow INTRODUCTIONSimulations on massively parallel systems are most effective when data movement is minimized. Data movement costs increase with the depth of the memory hierarchy, ie, a design trade-off for increased capacity. For example, the lowest level on-node storage in the IBM Blue Gene/Q A2 processor 1 is the per core 16 KiB L1 cache (excluding registers) and has a peak bandwidth of 819 GiB/s. The highest level on-node storage, 16 GiB of DDR3 main memory, provides a million times more capacity but at a greatly reduced bandwidth of 43 GiB/s, 1/19th of L1 cache. 2 One level further up the hierarchy is the parallel filesystem.* At this level, the bandwidth and capacity relationship are again less favorable and further compromised by the fact that the filesystem is a shared resource. Table 1 lists the per node peak main memory and filesystem bandwidth across five generations of Argonne National Laboratory leadership class systems, ie, Blue Gene/L, 5,6 Intrepid Blue Gene/P, 7,8 Mira Blue Gene/Q, 1,9 Theta, 10,11 and 2018's Aurora. 12Based on these peak values, the bandwidth gap between main memory and the filesystem is at least three orders of magnitude. Software must leverage the cache and main memory bandwidth performance advantage during as many workflow operations as possible to maximize performance.This paper presents a set of in-memory component coupling techniques that avoid filesystem use. We demonstrate these techniques for three different unstructured mesh-based adaptive analysis workflows. These demonstrations highlight the need for in-memory coupling techniques that are compatible with the design and execution of the analysis software involved. Key to this compatibility is supporting two interaction modes, ie, bulk and atomic information transfers.Section 3 provides a definition of the information transfer modes and reviews methods to couple workflow components using them. The core interfaces supporting adaptive unstructured mesh workflows are described in Section 3.1, and examples are given for their use in bulk and atomic information transfers. Section 3.2 details the d...

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Large Scale Frequent Pattern Mining Using MPI One-Sided Model

Vishnu

Agarwal

2015

2015 IEEE International Conference on Cluster Computing

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Fault tolerance for remote memory access programming models

Cited by 34 publications

References 66 publications

Active Access

Active Access

In‐memory integration of existing software components for parallel adaptive unstructured mesh workflows

Large Scale Frequent Pattern Mining Using MPI One-Sided Model

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