Fault-tolerant distributed shared memory on a broadcast-based architecture

Abstract

Abstract. The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes without contention, and can efficiently interconnect over one hundred nodes. Each node has a dedicated output channel and an array of receivers, with one receiver dedicated to every other node's output channel. The SOME-Bus eliminates the need for global arbitration and provides bandwidth that scales directly with the number of nodes in the system. Under the distributed shared memory (DSM) paradigm, the SOME-bus allows strong integration of the transmitter, receiver and cache controller hardware to produce a highly integrated system-wide cache coherence mechanism. Backward Error Recovery fault-tolerance techniques can rely on DSM data replication and SOME-Bus broadcasts with little additional network traffic and corresponding performance degradation. This paper uses extensive simulation to examine the performance of the SOME-Bus architecture under DSM and Backward Error Recovery.

Fault Tolerance in Passive Optical Networks: A Survey

“…It provided the recovery memory in each processing and fault tolerance. Network traffic was reduced and increase the processor utilization significantly [12]. Fault tolerance capability of three stages (input, middle or output stage) rearrangeable Clos network is analyzed in [14] [16].…”

Integrating coordinated checkpointing and recovery mechanisms into DSM synchronization barriers

“…Katsinis and Hetch [2004] rely on a specific broadcast architecture to achieve fault tolerance. Like Janakiraman and Tamir [1994], Kongmunvattana et al [2000], and Katsinis and Hetch [2004], we opted to use coordinated checkpointing. However, unlike them, we integrated an existing checkpointing library to our checkpointing mechanism.…”