Fault-Tolerant Nanoscale Processors on Semiconductor Nanowire Grids

Parameter variation sensing and estimation in nanoscale fabrics

“…The principle of sensor placement is to cover all regions implementing logic by the sensor effective range using the least number of sensors. Here we use WISP-0 processor [1], [2], [12], [13], [35] as an example to show the sensor placement and timing measurement architecture. WISP-0 is a NASIC processor design where NASIC design principles are applied.…”

“…In contrast to systematic variations, random variations have no spatial correlation, which means even neighboring devices may have completely different variation characteristics. Details on the types and sources of both systematic and random variations in these emerging nanoscale fabrics will be introduced later with emphasis on Nanoscale Application Specific Integrated Circuits (NASICs) fabric [9], [10], [11], [12], [13].…”

Emerging technologies and nanoscale computing fabrics

“…These considerations have recently led to the emergence of the concept of nanofabrics [8], or nanoscale computing fabrics. A nanoFabric can be defined as an array of connected nanoscale logic blocks (nanoBlocks), where a nanoBlock is a circuit b lock containing programmable devices to co mpute boolean logic functions and means to route data.…”

N³ASICs: Designing nanofabrics with fine-grained CMOS integration

“…Specifically, assembly of nanostructures, achieving reconfigurable devices, interfacing and overlay considerations are key issues for nanoscale computing fabrics. While nanofabrics such as NASICs [16] [21] [37] [17] [38] [19], CMOL [12] and FPNI [29] have been proposed minimizing certain manufacturing constraints, some or all of the aforementioned concerns still exist.…”