IMTC/98 Conference Proceedings. IEEE Instrumentation and Measurement Technology Conference. Where Instrumentation Is Going (Cat
DOI: 10.1109/imtc.1998.679768
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Fault-tolerant solid state mass memory for satellite applications

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Cited by 7 publications
(5 citation statements)
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“…This method, Semi-RAID, is very interesting when the storage medium is HDD. Reference [7] proposes an Error Correcting Code for a mass memory unit based on DRAMs, this paper investigates the usage of NAND flash technology as a main memory for spacecraft. Reference [10] proposes a scheme that enhances reliability of flashbased satellites storage systems; it applies RAID-5 mechanism at FTL level, the clustering architecture of this scheme allows to minimize power consumption and enhance reliability.…”
Section: Nand Over Sram As a Main Memorymentioning
confidence: 99%
“…This method, Semi-RAID, is very interesting when the storage medium is HDD. Reference [7] proposes an Error Correcting Code for a mass memory unit based on DRAMs, this paper investigates the usage of NAND flash technology as a main memory for spacecraft. Reference [10] proposes a scheme that enhances reliability of flashbased satellites storage systems; it applies RAID-5 mechanism at FTL level, the clustering architecture of this scheme allows to minimize power consumption and enhance reliability.…”
Section: Nand Over Sram As a Main Memorymentioning
confidence: 99%
“…To reduce the costs, the commercial off-the-shelf (COTS) memory components should be used. To enhance its reliability the redundancy and error detection and correction (EDAC) codes should be considered [4,24]. SAR technology generates large amounts of data and requires high speed data bus (HSDB) to transfer them between transmitter/receiver system and processing and storage system.…”
Section: Data Storage Subsystemmentioning
confidence: 99%
“…This board organization allows on-line reconfiguration of the memory module with different error correction code stmctures, depending on both the application considered and the data integrity requirement. [9] In fact, it is possible to choose the codeword length among n, 112 n or 1/4 n. Increasing the memory washing frequency, it is also possible to reduce the code length maintaining the overall bit error rate (BER). Of course, this solution reduces the availability.…”
Section: V-649mentioning
confidence: 99%
“…Of course, this solution reduces the availability. Code parameters are optimized for a specific mission using the optimization tools presented in [9][10]. The U0 Memory Interfaces provide the distributed file system management capability.…”
Section: V-649mentioning
confidence: 99%