2019
DOI: 10.1109/jxcdc.2019.2928769
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Ferroelectric Relaxation Oscillators and Spiking Neurons

Abstract: We report the experimental demonstration of the ferroelectric field-effect transistor (FEFET)based relaxation oscillators and spiking neurons. The ferroelectric relaxation oscillators and the ferroelectric spiking neurons, harnessing the abrupt hysteretic transition feature of ferroelectrics, have a compact 1T-1FEFET structure. The bias conditions of the FEFET can dynamically tune the hysteresis; therefore, the dynamics of oscillations and spikings can be controlled, which enable both excitation and inhibition… Show more

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Cited by 20 publications
(6 citation statements)
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“…The diode neuron circuit is compared with other neuron circuits with respect to the device type, and the number of external bias lines, and components needed for I&F operations, as well as energy consumption. In Table 1 , the CMOS, floating-gate FET and FBFET neuron circuits reported by other research groups require 5–23 elements with capacitors, and more than 1–10 external bias lines which require extra peripheral circuit for generating bias voltages, causing these neuron circuits to consume high power and energy ( Indiveri et al, 2006 ; Kornijcuk et al, 2016 ; Choi et al, 2018 ; Kwon et al, 2018 ; Kim et al, 2019 ; Wang and Khan, 2019 ; Zhang and Wijekoon, 2019 ; Chavan et al, 2020 ; Woo et al, 2020 ). The FBFET neuron circuit has relatively low energy consumption compared to others except ours, but this neuron circuit requires extra peripheral circuits for generating voltage bias and controllers for the I&F operation ( Choi et al, 2018 ; Kwon et al, 2018 ; Woo et al, 2020 ).…”
Section: Proposed Iandf Neuron Circuitmentioning
confidence: 99%
See 1 more Smart Citation
“…The diode neuron circuit is compared with other neuron circuits with respect to the device type, and the number of external bias lines, and components needed for I&F operations, as well as energy consumption. In Table 1 , the CMOS, floating-gate FET and FBFET neuron circuits reported by other research groups require 5–23 elements with capacitors, and more than 1–10 external bias lines which require extra peripheral circuit for generating bias voltages, causing these neuron circuits to consume high power and energy ( Indiveri et al, 2006 ; Kornijcuk et al, 2016 ; Choi et al, 2018 ; Kwon et al, 2018 ; Kim et al, 2019 ; Wang and Khan, 2019 ; Zhang and Wijekoon, 2019 ; Chavan et al, 2020 ; Woo et al, 2020 ). The FBFET neuron circuit has relatively low energy consumption compared to others except ours, but this neuron circuit requires extra peripheral circuits for generating voltage bias and controllers for the I&F operation ( Choi et al, 2018 ; Kwon et al, 2018 ; Woo et al, 2020 ).…”
Section: Proposed Iandf Neuron Circuitmentioning
confidence: 99%
“…Despite their advantages over Von-Neumann computing architectures in terms of energy efficiency, neuron circuits, driven by spiking neural networks (SNNs), still need more power for their integrate-and-fire (I&F) operations than biological neurons ( Choi et al, 2018 ). For most neuron circuits, particularly those using complementary metal-oxide semiconductor (CMOS), feedback field-effect-transistor (FBFET), and floating gate FET (FGFET) ( Indiveri et al, 2006 ; Kornijcuk et al, 2016 ; Choi et al, 2018 ; Kwon et al, 2018 ; Kim et al, 2019 ; Wang and Khan, 2019 ; Zhang and Wijekoon, 2019 ; Chavan et al, 2020 ; Woo et al, 2020 ), the presence of numerous transistors and external bias lines result in relatively high power consumption for the I&F operations. Thus, for energy-efficient neuron circuits, suppression in numbers of transistors, absence of external bias lines, and use of steep switching devices with extremely low subthreshold swings ( SS s) are needed ( Abbott, 1999 ; Izhikevich, 2003 ; Cheung, 2010 ); the steep switching devices are crucially necessary for a substantial reduction in power consumption of neuron circuits.…”
Section: Introductionmentioning
confidence: 99%
“…Digital computer has been faced with a few technical issues/limits, primarily because of ever-increasing power density [1,2]. To address the bottleneck, neuromorphic computation system, which can achieve (i) parallel networks and (ii) energy-efficient and robust computation by mimicking the biological brain, has received lots of attentions [3,4]. The neuromorphic networks consist of neuron circuits and synaptic devices.…”
Section: Introductionmentioning
confidence: 99%
“…Conventionally, von-Neumann-architecture-based computing systems have been used for processing large quantities of data, but such architectures encounter limitations in the realm of big data [9]. In recent years, the mimicking of biological brain synapses for neuromorphic systems has been widely investigated with the idea that these systems can process tremendous amounts of data at a faster transfer rate [10][11][12][13]. Non-volatile memory devices have been researched as synapse devices for the neuromorphic system, such as phase-change memory [14,15], resistive random-access memory [16], conductive-bridge random-access memory [17], and ferroelectric-gated FET (FeFET) [18].…”
Section: Introductionmentioning
confidence: 99%