2018
DOI: 10.1287/ijoc.2017.0762
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FiberSCIP—A Shared Memory Parallelization of SCIP

Abstract: Recently, parallel computing environments have become significantly popular. In order to obtain the benefit of using parallel computing environments, we have to deploy our programs for these effectively. This paper focuses on a parallelization of SCIP (Solving Constraint Integer Programs), which is a MIP solver and constraint integer programming framework available in source code. There is a parallel extension of SCIP named ParaSCIP, which parallelizes SCIP on massively parallel distributed memory computing en… Show more

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Cited by 30 publications
(14 citation statements)
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“…It is possible to use the SCIP solver implementing a branch-and-bound algorithm for mixedinteger nonlinear mathematical programming problems, but at the cost of increased solving time (and more memory consumption). Although parallel extensions of SCIP are available [30,31] simple workarounds are used now. They are: Ipopt multi starts options; some easily verifiable necessary conditions of the global optimum.…”
Section: Discussionmentioning
confidence: 99%
“…It is possible to use the SCIP solver implementing a branch-and-bound algorithm for mixedinteger nonlinear mathematical programming problems, but at the cost of increased solving time (and more memory consumption). Although parallel extensions of SCIP are available [30,31] simple workarounds are used now. They are: Ipopt multi starts options; some easily verifiable necessary conditions of the global optimum.…”
Section: Discussionmentioning
confidence: 99%
“…UG has been developed over 10 years as beta versions to have general interfaces for the base solvers. Internally, we have developed parallel solvers for SCIP [100,103,101], CPLEX (not developed anymore), FICO Xpress [102], PIPS-SBB [77,78], Concorde 9 , and QapNB [29]. In addition to the parallelization of these branch-and-bound base solvers, UG was used to develop MAP-SVP [105], which is a solver for the Shortest Vector Problem (SVP), and whose algorithm does not rely on branch-and-bound.…”
Section: The Ug Frameworkmentioning
confidence: 99%
“…The ramp-up is a process which runs until all CPU cores become busy. For a general discussion of the ramp-up process for parallel branch-and-bound, see Ralphs et al [86] and for the ramp-up process of FiberSCIP see Shinano et al [103]. One of the distinguishing features of FiberSCIP is racing ramp-up.…”
Section: Join Parasolver Threads Of Fiberscipmentioning
confidence: 99%
“…In both cases, the modular implementation enables the use of the same underlying sequential implementation with different parallel frameworks or the same parallel framework with different underlying sequential implementations. The UG framework, for example, has been customized to work with SCIP [Gamrath et al, 2016, 2018b, Xpress [FICO, Shinano et al, 2018a], and PIPS-SBB [Munguia et al, 2016, Munguía et al, 2019.…”
Section: Sophistication Of Implementationsmentioning
confidence: 99%