2019 IEEE 13th International Conference on ASIC (ASICON) 2019
DOI: 10.1109/asicon47005.2019.8983507
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Fine Time Resolution TDC Architectures -Integral and Delta-Sigma Types

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Cited by 6 publications
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“…We found that the golden-ratio relationship between the reference sine/cosine signal frequency and the sampling clock frequency is desirable [75,76]. Fig.…”
Section: Sar Tdc With Trigger Circuitmentioning
confidence: 88%
“…We found that the golden-ratio relationship between the reference sine/cosine signal frequency and the sampling clock frequency is desirable [75,76]. Fig.…”
Section: Sar Tdc With Trigger Circuitmentioning
confidence: 88%