Thin films of high-permittivity dielectrics are considered ideal candidates for realizing high charge density nanoscale capacitors for use in next generation energy storage and nanoelectronics applications. The experimentally observed capacitance of such film nanocapacitors is, however, an order of magnitude lower than expected. This dramatic drop in capacitance is attributed to the so-called "dead layer" -a low-permittivity layer at the metal-dielectric interface in series with the high-permittivity dielectric. Recent evidence suggests that this effect is intrinsic in the sense that its emergence is evident even in "perfectly" fabricated structures. The exact nature of the intrinsic dead-layer and the reasons for its origin still remain somewhat unclear. Based on insights gained from recently published ab initio work on SrRuO 3 /SrTiO 3 /SrRuO 3 and our first principle simulations on Au/MgO/Au and Pt/MgO/Pt nanocapacitors, we construct an analytical model that isolates the contributions of various physical mechanisms to the intrinsic dead layer. In particular we argue that strain-gradients automatically arise in very thin films even in complete absence of external strain inducers and, due to flexoelectric coupling, are dominant contributors to the dead layer effect. Our theoretical results compare well with existing, as well as our own, ab initio calculations and suggest that inclusion of flexoelectricity is essential for qualitative reconciliation of atomistic results. Our results also hint at some novel remedies for mitigating the dead layer effect.