Flexible Low‐Voltage Organic Complementary Circuits: Finding the Optimum Combination of Semiconductors and Monolayer Gate Dielectrics

Kraft, Ulrike; Sejfić, Mirsada; Kang, Myeong Jin; Takimiya, Kazuo; Zaki, Tarek; Letzkus, Florian; Burghartz, Joachim N.; Weber, Edwin; Klauk, Hagen

doi:10.1002/adma.201403481

Cited by 112 publications

(88 citation statements)

References 52 publications

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“…[ 38 ] Furthermore, for the samples with a stamp printed OTS layer, the higher mobility is even comparable to that of DNTT deposited onto a substrate at 60 °C (optimal temperature for vacuum deposited thin fi lms of DNTT that have the highest mobility). [38][39][40] These fi ndings allow us to benchmark the effectiveness of our method that uses paraffi n in stamping and directly prove its potential application in the fabrication of organic electronic devices. In order to further clarify the function of paraffi n stamping in the deposition of SAMs, we also used a control, by using the same treatment procedure on the SAMs without the paraffi n stamp but instead just dropped 20 µL of SAM solution onto the substrate and undergoing the same vapor phase treatment with HCl, thermal annealing, and ultrasonication.…”

Section: Resultsmentioning

confidence: 97%

“…This is particularly important for the complementary circuits that are integrated with p-channel and n-channel transistors. [ 31,40,53 ] Since previous paraffi n wax is not suitable to print the SAMs with the tail groups of fl uoroalkyl chains, we further modify the contents of the paraffi n wax by blending with micronized polytetrafl uoroethylene (PTFE)-modifi ed polyethylene wax (see Figure S6, Supporting Information). C8-PFTS was printed onto SiO2, and C8-PFPA was used onto AlO x respectively.…”

Section: Resultsmentioning

confidence: 99%

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Direct Patterning of Self‐Assembled Monolayers by Stamp Printing Method and Applications in High Performance Organic Field‐Effect Transistors and Complementary Inverters

Zhang

Ren

Peng

et al. 2015

Adv Funct Materials

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Self‐assembled monolayer (SAM) is usually applied to tune the interface between dielectric and active layer of organic field‐effect transistors (OFETs) and other organic electronics, a time‐saving, direct patterning approach of depositing well‐ordered SAMs is highly desired. Here, a new direct patterning method of SAMs by stamp printing or roller printing with special designed stamps is introduced. The chemical structures of the paraffin hydrocarbon molecules and the tail groups of SAMs have allowed to use their attractive van der Waals force for the direct patterning of SAMs. Different SAMs including alkyl and fluoroalkyl silanes or phosphonic acids are used to stamp onto different dielectric surfaces and are characterized by water contact angle, atomic force microscopy, X‐ray diffraction, and attenuated total reflectance Fourier transform infrared. The p‐type dinaphtho[2,3‐b:2′,3′‐f]thieno[3,2‐b]thiophene (DNTT) and n‐type F16CuPc OFETs show competitive mobility as high as 3 and 0.018 cm2 V−1 s−1, respectively. This stamp printing method also allows to deposit different SAMs on certain regions of same substrate, and the complementary inverter consists of both p‐type and n‐type transistors whose threshold voltages are tuned by stamp printing SAMs and shows a gain higher than 100. The proposed stamp or roller printing method can significantly reduce the deposition time and compatible with the roll‐to‐roll fabrication.

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Section: Resultsmentioning

confidence: 97%

Section: Resultsmentioning

confidence: 99%

Direct Patterning of Self‐Assembled Monolayers by Stamp Printing Method and Applications in High Performance Organic Field‐Effect Transistors and Complementary Inverters

Zhang

Ren

Peng

et al. 2015

Adv Funct Materials

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show abstract

“…A fundamental limitation of the dipping method is that it usually covers the entire substrate with the same SAM, making it difficult to create a dense pattern of more than one type of SAM on the same substrate. However, for certain applications, such as complementary circuits based on p-channel and n-channel organic TFTs that benefit from different gate-oxide modifications for each type of TFT [19], it is beneficial to be able to pattern more than one type of SAM on the same substrate. This will require the spatially resolved formation of each SAM on the substrate, which can be accomplished, for example, by microcontact printing [20][21][22][23], microwriting [24], lithography with ultraviolet radiation [25], or combinations thereof [26].…”

Section: Introductionmentioning

confidence: 99%

High-resolution spatial control of the threshold voltage of organic transistors by microcontact printing of alkyl and fluoroalkylphosphonic acid self-assembled monolayers

Hirata

Zschieschang

Yokota

et al. 2015

Organic Electronics

Self Cite

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“…[1][2][3][4][5][6][7][8] Low-voltage operation of OFETs is crucial to realize organic-based products driven by batteries or wireless power sources, and the current strategies include improving the fi eld-effect mobility ( µ FE ) and/ or employing a dielectric layer with large capacitance per unit area ( C i ) in OFETs. [9][10][11] The former faces the challenge of a fundamental limit in µ FE arising from the relatively weak intermolecular interaction in organic active layers, and accordingly the latter is more often adopted. According to C i = k / d , where k and d are the dielectric constant and thickness of the dielectric layer in OFETs, respectively, typical approach to get large C…”

mentioning

confidence: 99%

Bias‐Stress‐Stable Low‐Voltage Organic Field‐Effect Transistors with Ultrathin Polymer Dielectric on C Nanoparticles

Liu

Wang

Liu

et al. 2016

Adv Elect Materials

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both p-type and n-type OFETs. Based on the hybrid dielectrics, the operating gate bias ( V GS ) for the pentacene-based and N,N′ -ditridecyl-3,4,9,10-perylenetetracarboxylic diimide (PTCDI-C 13 H 27 )-based OFETs is down to −2 and 2 V, respectively. The devices exhibit typical µ FE , high ON/OFF ratio, and, in particular, excellent bias stress stability upon prolonged operation up to 6 × 10 4 s. The presence of the sputtered C NPs turns out to be the key for the formation of an ultrathin and pinhole-free polymer dielectric layer. This type of low-voltage OFETs with high operating stability can be realized on a fl exible substrate as well. Therefore, depositing an ultrathin low-k polymer on sputtered C NPs is a promising way for achieving high-performance low-voltage OFETs.The device structure of the low-voltage OFETs is schematically illustrated in Figure 1 , where a submonolayer of C is deposited by sputtering and spontaneously forms C NPs on Si. [ 23 ] The atomic force microscopy (AFM) image in Figure 1 demonstrates the uniform distribution of a number of C NPs on the substrate, and their height and lateral size are around 2 and 20 nm, respectively. The X-ray photoelectron spectroscopy (XPS) and Raman characterization results ( Figure S1, Supporting Information) suggest that the sputtered C NPs are amorphous C containing oxygenated groups and small graphite-like domains. [ 23 ] The C-NP-modifi ed Si surface possesses high surface energy and induces a small water contact angle of 45° (Figure 1 ), and the surface roughness is slightly increased from 0.17 ± 0.03 to 0.24 ± 0.03 nm upon the deposition of C NPs. Three kinds of low-k polymers, i.e., polystyrene (PS), polymethylmethacrylate (PMMA), and poly(2-vinyl naphthalene) (PVN), are then spin-coated onto the sputtered C NPs as the gate dielectrics (PS/C, PMMA/C, and PVN/C, respectively). The preparation conditions are controlled to deposit the dielectric layers as thin as 12-13 nm. Measured C i for the PS/C, PMMA/C, and PVN/C dielectrics ( Figure S2a,b, Supporting Information), about 180, 230, and 205 nF cm −2 , respectively, are quite large owing to their small d . Note that experimentally derived C i are well consistent with the theoretical ones calculated from k / d . For such ultrathin low-k dielectrics, the accumulated surface charge density ( n = C i V GS / q ) can be up to the order of 10 12 cm −2 at V GS = ±1 V, where q is the electron charge quantity. The pentacene/PTCDI-C 13 H 27 thin fi lm acts as the p-type/n-type organic active layer, respectively, and Cu on top is employed as the drain and source electrodes. [ 24 ] Figure 2 a-c shows the transfer characteristics of the pentacene-based low-voltage OFETs on the PS/C, PMMA/C, and PVN/C dielectrics, respectively, where the drain bias ( V DS ) is as low as −0.2 V and the V GS range is no higher than −2 V. I GS Organic fi eld-effect transistors (OFETs) are essential components in future fl exible, wearable, and portable electronic devices, which have numerous applications such as sensors, identifi cation ...

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Flexible Low‐Voltage Organic Complementary Circuits: Finding the Optimum Combination of Semiconductors and Monolayer Gate Dielectrics

Cited by 112 publications

References 52 publications

Direct Patterning of Self‐Assembled Monolayers by Stamp Printing Method and Applications in High Performance Organic Field‐Effect Transistors and Complementary Inverters

Direct Patterning of Self‐Assembled Monolayers by Stamp Printing Method and Applications in High Performance Organic Field‐Effect Transistors and Complementary Inverters

High-resolution spatial control of the threshold voltage of organic transistors by microcontact printing of alkyl and fluoroalkylphosphonic acid self-assembled monolayers

Bias‐Stress‐Stable Low‐Voltage Organic Field‐Effect Transistors with Ultrathin Polymer Dielectric on C Nanoparticles

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