Flip Chip Interconnection Systems and its Reliability Performance

Lee, C.; Yeo, Anders; Min, Tan Ai

doi:10.1109/estc.2006.280138

Cited by 8 publications

(9 citation statements)

References 11 publications

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“…As flip chip technology gain popularity in the needs of microelectronics packaging, it is important to understand the advantages and limitations of the various flip chip options suitable for specific applications. 1,2) Recently, the stud bump bonding method has been proposed as a very attractive solution for a low cost flip chip technology. Stud bumping is based on the wire bonding technology by pressing the wire to form a ball on the pad.…”

Section: Introductionmentioning

confidence: 99%

Thermal and Mechanical Properties of Flip Chip Package with Au Stud Bump

Jung

2013

Mater. Trans.

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The Au stud bumps offer a low cost flip chip solution for low I/O (input/output) count ICs and fine pitch packaging applications. The thermo-mechanical reliability of the flip chip package with Au stud bump was investigated in this study. Flip chip solder joints were fabricated using the Au stud bumps and Sn surface finish. And two different types of reliability test was done with and without the underfill process. Isothermal aging study was performed to investigate the formation and growth of the intermetallic compound (IMC) layer at the solder/ metallization interface. The micro structural change of the Au stud solder joints were characterized using scanning electron microscopy, energy dispersive X-ray spectroscopy. Results showed that before aging for 250 h, AuSn 4 and (Cu,Au) 3 Sn IMC formed and after aging for 250 h Cu 3 Sn IMC formed and grew as the aging time got longer. Effect on the mechanical reliability of the Au stud solder joints was also studied using shear (bonding) tester, and the temperature cycle test was chosen for the thermo-mechanical reliability evaluation of the Au stud solder joints.

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Section: Introductionmentioning

confidence: 99%

Thermal and Mechanical Properties of Flip Chip Package with Au Stud Bump

Jung

2013

Mater. Trans.

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“…To achieve these goals, lots of technologies are applied to the nodes, such as flip chip, and flexible substrate. There are lots of researches and publications focus on the characterization [1][2][3][4] of the above technologies.…”

Section: Introductionmentioning

confidence: 99%

Statistical method of modeling and optimization for wireless sensor nodes with different interconnect technologies and substrates

Zheng¹,

Mathewson²,

O’Flynn³

et al. 2010

2010 11th International Conference on Electronic Packaging Technology &Amp; High Density Packaging

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Original citationZheng AbstractA comparison study was carried out between a wireless sensor node with a bare die flip-chip mounted and its reference board with a BGA packaged transceiver chip. The main focus is the return loss (S parameter S11) at the antenna connector, which was highly depended on the impedance mismatch. Modeling including the different interconnect technologies, substrate properties and passive components, was performed to simulate the system in Ansoft Designer software. Statistical methods, such as the use of standard derivation and regression, were applied to the RF performance analysis, to see the impacts of the different parameters on the return loss. Extreme value search, following on the previous analysis, can provide the parameters' values for the minimum return loss. Measurements fit the analysis and simulation well and showed a great improvement of the return loss from -5dB to -25dB for the target wireless sensor node. IntroductionAs wireless sensor node being used widely in environment monitoring and medical applications, reducing the weight and size and increasing the mobility are becoming essential. To achieve these goals, lots of technologies are applied to the nodes, such as flip chip, and flexible substrate. There are lots of researches and publications focus on the characterization [1-4] of the above technologies.However, from RF system point of view, very little effort was done in considering these technologies as components which could change the final RF performance of the system. The aim of this paper is to develop a methodology to model the advanced packaging technologies for RF circuit simulation and obtain an optimized solution of the whole system. Statistical methods, like standard deviation, coefficient of variation, regression, curve fitting, are utilized during the parameter sweep procedure to get the optimization results.In this paper, the impacts of a wide range of parameters on RF performance were studied and a statistical based method is proposed to improve the return loss. The paper is organized as the following:  Main focus description: poor return loss caused by improper impedance matching.  Modelling of the RF circuit, including the packaging and substrate.  Description of the statistical methods used during analysis.  Optimization performed to improve the return loss.Measurements were carried out to match the optimized solution.

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“…Furthermore, the characteristics and circuit models of inkjet-printed coplanar waveguides on quartz glass substrate have also been investigated in [7] [8]. According to [11], the performance of non-solder interconnects highly depends on the application environments, such as adhesives, surface pad finishes, bump materials and joint location. Due to the different electrical and mechanical properties of printed substrates, these results cannot be directly used on paper-based systems.…”

Section: Introductionmentioning

confidence: 99%

Co-design of flip chip interconnection with anisotropic conductive adhesives and inkjet-printed circuits for paper-based RFID tags

Xie

Shen

Mao

et al. 2011

2011 IEEE 61st Electronic Components and Technology Conference (ECTC)

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Co-design of flip chip interconnection with anisotropic conductive adhesives and inkjet-printed circuits for paper-based RFID tags.In: 2011 61st Electronic Components and Technology Conference, ECTC 2011 (pp. 1752-1757 AbstractIn this paper we study the radio frequency performance of interconnect using anisotropic conductive film (ACF). A series of experiments are conducted in order to measure and model the electrical characteristics of inkjet-printed circuits on paper substrate as well as the impedance parameters of ACF interconnect at high frequency. Four-point measurement structure, time domain reflectometry (TDR), vector network analyzer (VNA) and de-embedded technology are used to ensure the accuracy of experiments. Equivalent circuit models are built based on the experimental results. Finally, these models are considered as parts of the matching network and circuit design for the RFID receiver, which can be co-designed for developing paper-based electronic systems. It is found that since the difference between RFID tags with and without ACF interconnects is negligible, the influence of ACF interconnects can be ignored for paper-based UHF RFID tag. ACF is a feasible interconnect material for paper-based RFID tags.

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Flip Chip Interconnection Systems and its Reliability Performance

Cited by 8 publications

References 11 publications

Thermal and Mechanical Properties of Flip Chip Package with Au Stud Bump

Thermal and Mechanical Properties of Flip Chip Package with Au Stud Bump

Statistical method of modeling and optimization for wireless sensor nodes with different interconnect technologies and substrates

Co-design of flip chip interconnection with anisotropic conductive adhesives and inkjet-printed circuits for paper-based RFID tags

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