FlipTracker: Understanding Natural Error Resilience in HPC Applications

Abstract

As high-performance computing systems scale in size and computational power, the danger of silent errors, i.e., errors that can bypass hardware detection mechanisms and impact application state, grows dramatically. Consequently, applications running on HPC systems need to exhibit resilience to such errors. Previous work has found that, for certain codes, this resilience can come for free, i.e., some applications are naturally resilient, but few studies have shown the code patterns-combinations or sequences of computations-that make an application naturally resilient. In this paper, we present FlipTracker, a framework designed to extract these patterns using fine-grained tracking of error propagation and resilience properties, and we use it to present a set of computation patterns that are responsible for making representative HPC applications naturally resilient to errors. This not only enables a deeper understanding of resilience properties of these codes, but also can guide future application designs towards patterns with natural resilience.

Exploring Non-Volatility of Non-Volatile Memory for High Performance Computing Under Failures

“…For (3), we use crash tests, but we can avoid them by an application characterization study. In particular, we can detect computation patterns that tolerate computation inaccuracy as in [25]. Then we set up a model to correlate those patterns and application recomputability.…”

“…For (2), when the application outcome is different from that of the golden run, the users can claim a silent data corruption (SDC) happens [25,70]. With the acceptance verification, many applications treat this kind of SDC as benign and ignorable.…”

“…The times when the execution is stopped follow a discrete uniform distribution. This method of interrupting applications is common in the research on system fault tolerance [10,24,25,39,70].…”

“…Persisting data objects in each code region ensures that the most recent computation results in a phase are persistent in NVM, and can effectively improve application recomputability. The similar definition of code regions can be found in [25] to study application resilience to errors.…”

MATCH: An MPI Fault Tolerance Benchmark Suite

“…These crucial facts lead to increasing importance of and challenges for developing efficient and effective fault tolerance designs for scaling HPC systems [4], [5]. There are numerous fault tolerance techniques proposed to protect MPI application execution from system failures.…”