Floating Impedance Simulator Realization

Likhitkitwoerakul, Nutcha; Roongmuanpha, Natchanai; Tangsrirat, Worapong

doi:10.1109/ecti-con49241.2020.9158238

Cited by 4 publications

(6 citation statements)

References 11 publications

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“…The circuits reported in [7,8,10,11] are electronically tunable but they can provide only +L. The circuits reported in [9,[12][13][14][15] are not electronically tunable. To test the time domain response of the proposed inductor simulator, a sinusoidal input voltage with a peak-to-peak value of 80 mV and frequency of 1 MHz is used as the input signal to the simulated inductor.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…The circuits reported in [7,8,10,11] are electronically tunable but they can provide only +L. The circuits reported in [9,[12][13][14][15] are not electronically tunable.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…A survey of recent literature reveals that various approaches are used in the realization of floating inductors [5][6][7][8][9][10][11][12][13][14][15]. In [5], a digitally tunable floating inductor using two current differential amplifiers (CDAs), two resistors and an array of five floating capacitors, each one connected to a switch, is reported.…”

Section: Introductionmentioning

confidence: 99%

“…In [12], two differential voltage-to-current converters, two resistors and one capacitor are used. In [13], another topology using two differential difference current conveyors, two resistors and one grounded capacitor is introduced. The circuit reported in [14] employs two modified current feedback operational amplifiers (MCFOAs), two resistors and one grounded capacitor.…”

Section: Introductionmentioning

confidence: 99%

“…The circuit reported in [14] employs two modified current feedback operational amplifiers (MCFOAs), two resistors and one grounded capacitor. The main weakness of [12][13][14] is the lack of electronic tunability. In [15], a different topology based on CCII±, one dual output transconductance amplifier (DO-OTA), one resistor and one floating capacitor is used.…”

Section: Introductionmentioning

confidence: 99%

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Realization of an Electronically Tunable Resistor-Less Floating Inductance Simulator Using VCII

et al. 2022

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In this paper, a new implementation of an electronically tunable resistor-less floating inductance simulator using a second-generation voltage conveyor (VCII) is presented. The proposed circuit is resistor-free (benefiting from the intrinsic resistors at the Y terminals of the employed VCIIs) and composed of three VCIIs and a single grounded capacitor. Using a control current (Icon), the value of impedance at the Y terminal of the VCII is varied, whereby the value of the simulated inductance is tuned. The proposed circuit is designed at a transistor level using 0.18 µm TSMC CMOS parameters and ±0.9 V supply voltage. PSpice simulations are carried out to confirm the effectiveness of the proposed circuit. For a range of Icon from 0 µA to 50 µA, the value of the simulated L can be varied from −576 µH to −324 µH and from +316 µH to +576 µH for negative and positive simulators, respectively, in the frequency range of 100 kHz–3 MHz. Favorably, the value of the series resistance remains below 76 Ω. Simulation results show an error value below 4.8% and power consumption variation is from 1.64 mW to 1.92 mW. Moreover, application of the proposed circuit as a standard band-pass RLC filter is also included.

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Section: Simulation Resultsmentioning

confidence: 99%

“…The circuits reported in [7,8,10,11] are electronically tunable but they can provide only +L. The circuits reported in [9,[12][13][14][15] are not electronically tunable.…”

Section: Simulation Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Realization of an Electronically Tunable Resistor-Less Floating Inductance Simulator Using VCII

et al. 2022

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Floating parallel lossy inductance, parallel lossy capacitance, parallel C‐D, and lossless capacitance multiplier circuits using current feedback operational amplifiers

Bhaskar,

Shrivastava,

Raj

et al. 2023

Circuit Theory & Apps

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SummaryA new synthetic floating simulator topology is proposed which realizes lossy parallel inductance (R‐L), lossy parallel capacitance (R‐C), lossy parallel C‐D, and lossless floating capacitance multiplier (FCM) circuits using only three current feedback operational amplifiers (CFOA) as active elements and three impedances. In all the presented circuits, the value of L, C, and D is independently controllable through a single resistance without requiring any matching condition for passive elements. A novel feature of the proposed circuit involves a straightforward adjustment in the CFOA connections, allowing the circuit to function as either a floating lossless immittance simulator or a floating series‐type lossy immittance simulator. Various application examples of the presented circuits such as lead compensator, lag compensator, first‐order high‐pass filter, and fourth‐order Butterworth filter are also given to justify the theoretical analysis. To validate the workability of the proposed circuits, several analyses are conducted, including frequency analysis, transient analysis, Monte‐Carlo analysis, and temperature analysis, using the macro‐model of AD844 in the SPICE simulation tool. Experimental results of the parallel R‐L simulator and application examples are also provided using commercially available IC AD844‐type integrated CFOAs.

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