Flow-through latch and edge-triggered flip-flop hybrid elements

Abstract

This paper describes a hybrid latch-flipflop (HLFF) timing methodology aimed at a substantial reduction in latch latency and clock load. A common principle is employed to derive consistent 1996 IEEE International Solid-state Circuits Conference 0-7803-3136-2 I 96 I $5.00 I 0 lEEE

Novel explicit pulse-based flip-flop for high speed and low power SoCs

“…High-performance pulse-based flip-flops such as hybrid latch-flip-flop (HLFF) [2] and semi-dynamic flip-flop (SDFF) [3] are popularly used for the design of high-performance synchronous digital systems. These flip-flops are configured as a semi-dynamic structure, in which a dynamic front stage is followed by a static back stage.…”

“…Among these components, the internal power consumption is a dominant portion, and affected by circuit structure and operation principle as well as input switching activity. Pulse-based flip-flops having the performance better than that of traditional master-slave flip-flops have been popularly used these days [2,3]. These flip-flops use a single-stage latch instead of master-slave latches, whose transparency period is reduced to a brief interval to allow the level-sensitive latch to operate as an edge-triggered flip-flop.…”

Double edge triggered feedback flip-flop in sub 100nm technology

“…The structure of Hybrid Latch Flip-flop (HLFF) is shown in Figure 1 [6]. While HLFF has a very simple circuit, its unnecessary internal transitions increase the total power consumption of the flip-flop.…”

“…It is based on generating an explicit transparency window for the time that the transition is allowed. Its idea is similar to a latch because it can provide a soft clock edge which allows for slack passing and minimizes the effect of clock skew on the cycle time [6]. However, the existence of redundant transitions in the internal nodes of HLFF leads to more power consumption.…”

Dual-edge triggered static pulsed flip-flops

“…Figure 1 shows the schematic diagram of representative high performance flip-flops and latches . They are Hybrid Latch-Flip-Flop (HLFF) [3], modified Sense Amplifierbased Flip -Flop (SAFF) [4], and differential ConditionalCapture Flip -Flop (CCFF) [5]. HLFF as shown in Figure 1(a) is actually a latch with a brief transparency period.…”