Formation of electroless barrier and seed layers in a high aspect ratio through-Si vias using Au nanoparticle catalyst for all-wet Cu filling technology

Inoue, Fumihiro; Shimizu, Tomohiro; Yokoyama, Takumi; Miyake, Hiroshi; Kondo, Kazuo; Saito, Takeyasu; Hayashi, Tarō; Tanaka, Shukichi; Terui, Toshifumi; Shingubara, Shoso

doi:10.1016/j.electacta.2011.02.078

Cited by 55 publications

(48 citation statements)

References 27 publications

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“…Moreover, the insertion of a self-assembled-monolayer (SAM) to the formation of these layers is effective to produce conformal and thin film [84][85][86][87].…”

Section: Sam Activationmentioning

confidence: 99%

30 years of electroless plating for semiconductor and polymer micro-systems

Shacham‐Diamand

Osaka

Okinaka

et al. 2015

Microelectronic Engineering

149

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Electroless deposition (ELD) is a well-known method for preparing thin films of metals and their alloys. It is a highly selective method allowing additive patterning of isolated and embedded structures on insulating substrates, e.g. glass, plastic or ceramic. It is a relatively low temperature (less than the boiling point of the electrolyte) and low cost process compared to other physical and chemical vapor deposition methods. ELD features uniform and normally conformal deposition (additives may affect its conformality) with low defect density and some unique material properties. In the last 30 years electroless plating of metals (e.g. copper, gold, nickel, cobalt, palladium, iron, silver, etc.) and their alloys, was demonstrated for micro system applications: microelectronics, micro electro mechanics, micro electro optics and microfluidics, micro fuel cells, micro batteries etc. Electroless plating was also demonstrated on nano structures, both artificial and natural. In this paper we present a short tribute to the recent advances in electroless plating in the last 30 years. Those advances and innovations are due to the work of many scientists and engineers on a time span started in the 19 th century. The progress in electroless plating followed the need and the trend for better metallization technologies for complex structures with critical dimensions that had been shrinking continuously in the last few decades.

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“…Moreover, the insertion of a self-assembled-monolayer (SAM) to the formation of these layers is effective to produce conformal and thin film [84][85][86][87].…”

Section: Sam Activationmentioning

confidence: 99%

30 years of electroless plating for semiconductor and polymer micro-systems

Shacham‐Diamand

Osaka

Okinaka

et al. 2015

Microelectronic Engineering

149

View full text Add to dashboard Cite

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“…It is therefore interesting to test the feasiblity of our completely aqueous metallization process with respect to the high aspect ratio microstructures. Finally, another important point to be underlined is that the nickel-boron alloys have been reported to be excellent copper diffusion barriers, [12,29] our Ni─B film is thus expected to become an auxiliary copper barrier to S 3 N 4 .…”

Section: Vaccuum-free Copper Filling Of Microfabricated Devicesmentioning

confidence: 99%

Direct Electroless Deposition of Nickel onto Silicon Nitride Ceramic: A Novel Approach for Copper Metallization of Micro‐/Nano‐fabricated Devices

et al. 2020

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Current surface modification chemistry of silicon nitride (Si3N4) in the fabrication of micro/nano systems (MEMS/NEMS) mainly relies on multistep chemical processes, essentially consisting of a surface pretreatment and a challenging silanization procedure. Although direct modification of Si3N4 surface has rarely been reported in the literature, here a simple surface functionalization strategy using diazonium chemistry in open air and at room temperature, which provides a practical solution to directly attach aminophenyl groups to pristine silicon nitride without altering its intrinsic properties, is described. These strongly grafted amine‐terminated groups are easily activated to become nuclei for initializing electroless nickel plating (autocatalytic nickel deposition). This electroless nickel plating of silicon nitride while avoiding the multiplicity and complexity of the process steps is ideal for its integration into a typical MEMS/NEMS process flow. In a possible integration scheme, due to its suitable properties, this nickel film serves as a conducting seed layer for the electrolytic deposition of copper to fill the microdevices, thereby avoids the use of typically employed expensive vacuum processes.

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“…Thus, an all-wet process at low temperature is performed to form electroless deposition of barrier and Cu seed layers for high aspect ratio TSV. Electroless depositions of Co–W–B and Cu as barrier/seed layers are achieved by using Au nanoparticles (Au-NPs) or Pd nanoparticles (Pd-NPs) as a catalyst [14–16]. Morphologies from different positions of one TSV after the adsorption of Pd-NPs at room temperature for 3 h are shown in Fig.…”

Section: Tsv Barrier and Seed Layersmentioning

confidence: 99%

Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)

2017

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3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.

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Formation of electroless barrier and seed layers in a high aspect ratio through-Si vias using Au nanoparticle catalyst for all-wet Cu filling technology

Cited by 55 publications

References 27 publications

30 years of electroless plating for semiconductor and polymer micro-systems

30 years of electroless plating for semiconductor and polymer micro-systems

Direct Electroless Deposition of Nickel onto Silicon Nitride Ceramic: A Novel Approach for Copper Metallization of Micro‐/Nano‐fabricated Devices

Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)

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