Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)

Shen, Wen Wei; Chen, Kuan‐Neng

doi:10.1186/s11671-017-1831-4

Cited by 152 publications

(60 citation statements)

References 40 publications

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“…LIMS analysis of actual interconnect components.-The next step of our analytical development consisted in testing of the LMS performance on actual state-of-the-art Cu electronic interconnects, namely through-silicon-vias (TSV). 4,[63][64][65] These structures are large scale interconnects for the three-dimensional integration of multiple stacked transistor levels in cutting edge microprocessors. Their high aspect ratios constitute an important challenge for the electrochemical deposition of Cu and therefore new concepts for their successful additive-assisted electrochemical superfilling have been developed.…”

Section: Resultsmentioning

confidence: 99%

Review—Laser Ablation Ionization Mass Spectrometry (LIMS) for Analysis of Electrodeposited Cu Interconnects

Grimaudo¹,

Moreno‐García²,

Riedo

et al. 2018

J. Electrochem. Soc.

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In this contribution highly sensitive and quantitative analytical methodologies based on femtosecond Laser Ablation Ionization Mass Spectrometry (fs-LIMS) for the analysis of model systems and state-of-the-art Cu interconnects are reviewed and discussed. The method development introduces in a first stage a 1D chemical depth profiling approach on electrodeposited Cu films containing periodically confined organic layers. Optimization of measurement conditions on these test platforms enabled depth profiling investigations with vertical resolution at the nm level. In a second stage, a matrix-free laser desorption methodology was developed that allowed for preliminary molecular identification of the embedded organic contaminants beyond elementary composition. These studies provided specific fragmentation markers in the lower mass range, which support a previously proposed reaction mechanism responsible for successful leveling employing a new class of plating additives for Damascene processes. Further combined LIMS and Scanning Auger Microscopy (SAM) studies on through-silicon-vias (TSV) interconnects confirmed the embedment upon plating of the organic additives at the upper side-walls of the TSV channel in the boundary between the Cu seed layer and the electrodeposited Cu.

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Section: Resultsmentioning

confidence: 99%

Review—Laser Ablation Ionization Mass Spectrometry (LIMS) for Analysis of Electrodeposited Cu Interconnects

Grimaudo¹,

Moreno‐García²,

Riedo

et al. 2018

J. Electrochem. Soc.

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show abstract

“…Thermal power and cross-talk issues are other important factors to be considered in utilizing TSV connections with CMOS. Furthermore, TSV arrays may impact the behavior of CMOS-based circuits by inducing thermo-mechanical stress in the front end of line (FEOL) layer [58].…”

Section: Three-dimensional Integrated Circuitsmentioning

confidence: 99%

The impact of on-chip communication on memory technologies for neuromorphic systems

Moradi

Manohar

2018

J. Phys. D: Appl. Phys.

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Emergent nanoscale non-volatile memory technologies with high integration density offer a promising solution to overcome the scalability limitations of CMOS-based neural networks architectures, by efficiently exhibiting the key principle of neural computation. Despite the potential improvements in computational costs, designing high-performance on-chip communication networks that support flexible, large-fanout connectivity remains as daunting task. In this paper, we elaborate on the communication requirements of large-scale neuromorphic designs, and point out the differences with the conventional networkon-chip architectures. We present existing approaches for on-chip neuromorphic routing networks, and discuss how new memory and integration technologies may help to alleviate the communication issues in constructing next-generation intelligent computing machines.

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“…In recent years, developments in new fabricating and packaging technologies, such as extreme ultra-violet (EUV) lithography and three-dimensional integrated circuits (3D ICs), have made possible the continuation of Moore’s Law [ 1 , 2 , 3 , 4 ]. However, while it improves performance, the increased transistor density of microchips increases power density, which is a cause of microchip thermal management becoming one of the bottlenecks in the further development of semiconductor technology [ 5 , 6 ].…”

Section: Introductionmentioning

confidence: 99%

An Experimental Study of Microchannel and Micro-Pin-Fin Based On-Chip Cooling Systems with Silicon-to-Silicon Direct Bonding

Qiu

et al. 2020

Sensors

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This paper describes an experimental study of the cooling capabilities of microchannel and micro-pin-fin based on-chip cooling systems. The on-chip cooling systems integrated with a micro heat sink, simulated power IC (integrated circuit) and temperature sensors are fabricated by micromachining and silicon-to-silicon direct bonding. Three micro heat sink structures: a microchannel heat sink (MCHS), an inline micro-pin-fin heat sink (I-MPFHS) and a staggered micro-pin-fin heat sink (S-MPFHS) are tested in the Reynolds number range of 79.2 to 882.3. The results show that S-MPFHS is preferred if the water pump can provide enough pressure drop. However, S-MPFHS has the worst performance when the rated pressure drop of the pump is lower than 1.5 kPa because the endwall effect under a low Reynolds number suppresses the disturbance generated by the staggered micro pin fins but S-MPFHS is still preferred when the rated pressure drop of the pump is in the range of 1.5 to 20 kPa. When the rated pressure drop of the pump is higher than 20 kPa, I-MPFHS will be the best choice because of high heat transfer enhancement and low pressure drop price brought by the unsteady vortex street.

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Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)

Cited by 152 publications

References 40 publications

Review—Laser Ablation Ionization Mass Spectrometry (LIMS) for Analysis of Electrodeposited Cu Interconnects

Review—Laser Ablation Ionization Mass Spectrometry (LIMS) for Analysis of Electrodeposited Cu Interconnects

The impact of on-chip communication on memory technologies for neuromorphic systems

An Experimental Study of Microchannel and Micro-Pin-Fin Based On-Chip Cooling Systems with Silicon-to-Silicon Direct Bonding

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