Formation of Grown-in Defects during Czochralski Silicon Crystal Growth

Abstract

The formation behavior of grown-in defects in Czochralski silicon (CZ-Si) crystals was investigated using two crystals that were quenched during growth but in one case after crystal growth had been halted for 5 h. The distributions of grown-in defect density and size, and their micro-structures were analyzed as a function of temperature during crystal growth just before quenching by means of an optical precipitate profiler (OPP) and an atomic force microscope (AFM) coupled with a laser particle counter. The formation of grown-in defects, which are considered to be octahedral voids, was found to consist of two dominant processes. The first step involves rapid void growth in a narrow temperature range of about 30° C below 1100° C and the subsequent step consists of an oxide film growth on the inner surface of the void during the cooling process to about 900° C after void formation. It was also found that the growth of the oxide film in the voids is rate-limited by the diffusion rate of oxygen atoms in silicon. In addition, it is strongly suggested that void formation in such a narrow temperature range is due to a rapid agglomeration of vacancies.

A microscopically accurate continuum model for void formation during semiconductor silicon processing

“…The final metric is the so-called nucleation temperature, which is the temperature at which visible voids are suddenly formed during crystal growth. Many experiments [12][13][14]41,42] have shown that the measurable void size distribution suddenly begins to evolve once a crystal segment has cooled to about 1100 1C and then evolves for a short time until all mobile species have been incorporated into stable clusters. There is wide consensus that the nucleation and growth temperature interval, which somewhat depends on the cooling conditions during growth, is in the range 1050-1110 1C.…”

“…In this case the void densities were probed by measuring the GOI of test capacitor structures grown over the entire wafer surface [13,14]. Note that the number of capacitor failures (gate-oxide breakdowns) due to the presence of one or more voids is now related to the surface void density.…”

“…Itsumi et al [10] were the first to employ transmission electron microscopy (TEM) on copper-decorated wafer samples to identify the structure of COPs as octahedral voids faceted along (1 1 1) planes with sizes ranging from 100 to 300 nm. Numerous studies were subsequently performed to characterize the response of the void size distribution to changes in the crystal growth conditions and it has been demonstrated that the temperature interval between about 1050 and 1100 1C is mainly responsible for setting the final size distribution of voids during crystal growth [11][12][13][14].…”

A Selective Review of the Simulation of the Defect Structure of Dislocation-Free Silicon Single Crystals

“…Formation of the microvoids is occurs in two stages [35]. In the first stage in the temperature range 1403...1343 K occurs rapidly growth of sizes.…”

Efficient Detection and Size Determination of Crystal Originated “Particles” (COPs) on Silicon Wafer Surface Using Optical Scattering Technique Integrated to an Atomic Force Microscope

“…Recent efforts especially in wafer cleaning, and etching technology have markedly reduced the density of particles or contaminants on silicon wafer surfaces. However, there is another type of "particle" commonly found by the laser particle counter on the Czochralski-grown single crystal silicon wafer surface, which is typically called crystal originated "particles" (COPs) [1], [2]. COPs have been Manuscript recognized as surface defects or micropits, which originate from grown-in defects [3].…”