2007
DOI: 10.1142/s0218126607003575
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Fpga Acceleration for Dna Sequence Alignment

Abstract: In this paper, we present two new hardware architectures that implement the Smith–Waterman algorithm for DNA sequence alignment. Previous low-cost approaches based on Field Programmable Gate Array (FPGA) technology are reviewed in detail and then improved with the goal of increased performance at the same cost (i.e., area). This goal is achieved through low level optimizations aimed to adapt the systolic structure implementing the algorithm to the regular structure of FPGAs, essentially finding the optimum gra… Show more

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Cited by 21 publications
(11 citation statements)
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“…Meanwhile, Liu et al have presented SWAPHI-LS [12] a highly optimized hand-tuned implementation for Intel Xeon Phi accelerators. In addition, several proposals based on FPGA speedup sequence alignments [22,2] in the context of DNA comparison. Moreover, Wienbrandt presents a study of multi-FPGAs version in [21].…”
Section: Introductionmentioning
confidence: 99%
“…Meanwhile, Liu et al have presented SWAPHI-LS [12] a highly optimized hand-tuned implementation for Intel Xeon Phi accelerators. In addition, several proposals based on FPGA speedup sequence alignments [22,2] in the context of DNA comparison. Moreover, Wienbrandt presents a study of multi-FPGAs version in [21].…”
Section: Introductionmentioning
confidence: 99%
“…The implementation reported in [14] achieves 1260 GCUPS peak performance on a Xilinx XC2V6000-4 FPGA part. The implementations reported in [13] and [15] achieve over 3200 GCUPS on the same part. In comparison, our multi-purpose core achieves ~800 GCUPS on the same part.…”
Section: List Of Maximum Scoring Subject Sequencesmentioning
confidence: 97%
“…The FPGA implementations presented in [13][14] [15] are restricted to DNA sequences, which are a special case of our implementation. The implementation reported in [14] achieves 1260 GCUPS peak performance on a Xilinx XC2V6000-4 FPGA part.…”
Section: List Of Maximum Scoring Subject Sequencesmentioning
confidence: 99%
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“…The processing element employed in this implementation is based on that proposed in [5] with some minor modifications (refer to Figure 6). It is the hardware synthesis of (1) after differential coding is applied.…”
Section: A Processing Elementmentioning
confidence: 99%