FPGA-based implementation of basic image processing applications as low-cost IP core

Altuncu, Mehmet Ali; Kosten, Mehmet Muzaffer; Cavuslu, Metaet Ali; Şahin, Sühap

doi:10.1109/siu.2018.8404175

Cited by 4 publications

(2 citation statements)

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“…In 2018, Altuncu et al [18] discussed the use of fieldprogrammable gate array (FPGA) in case of unmanned vehicles. They have working in the direction so that the cost can be reduced.…”

Section: Literature Workmentioning

confidence: 99%

A computational study and meta-analysis of content based image retrieval

Mathur¹,

Badone²

2019

IJATEE

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There is the need of efficient image retrieval in different areas including health industry and data processing. It is also important to fetch relevant data for the diagnosis, prediction and data correlation purpose. In the view of the above a study and analysis have been presented for the content based image retrieval (CBIR) methods and their approaches. The objective of this paper is to elaborate and explore the latest trend in this area for the purpose of discovering analytical and computational prospects. So different related and latest proposed and presented methods have been discussed along with the advantages and gaps. Based on the above, the limitations and the problem statements have been highlighted with the suggested solutions.

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“…In 2018, Altuncu et al [18] discussed the use of fieldprogrammable gate array (FPGA) in case of unmanned vehicles. They have working in the direction so that the cost can be reduced.…”

Section: Literature Workmentioning

confidence: 99%

A computational study and meta-analysis of content based image retrieval

Mathur¹,

Badone²

2019

IJATEE

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“…In recent years, there has been an increase in computational solutions employing Digital Image Processing (DIP) techniques, such as facial recognition, medical image enhancement, signature authentication, traffic control, autonomous cars, and product quality analysis [ 1 , 2 , 3 , 4 , 5 ]. These applications usually require real-time processing.…”

Section: Introductionmentioning

confidence: 99%

Fully Parallel Implementation of Otsu Automatic Image Thresholding Algorithm on FPGA

Barros

Dias

Fernandes

2021

Sensors

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This work proposes a high-throughput implementation of the Otsu automatic image thresholding algorithm on Field Programmable Gate Array (FPGA), aiming to process high-resolution images in real-time. The Otsu method is a widely used global thresholding algorithm to define an optimal threshold between two classes. However, this technique has a high computational cost, making it difficult to use in real-time applications. Thus, this paper proposes a hardware design exploiting parallelization to optimize the system’s processing time. The implementation details and an analysis of the synthesis results concerning the hardware area occupation, throughput, and dynamic power consumption, are presented. Results have shown that the proposed hardware achieved a high speedup compared to similar works in the literature.

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A study on VLSI implementation of image enhancement techniques

Aklak

Pugazhenthi²,

Alex

2021

Concurrency and Computation

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In real-time, the images captured are not always appreciable for visual perception.The quality of the image relies on the illumination condition. Contrast enhancement is required to improve the visual quality of the image. In this article, the image enhancement techniques that are adaptable for real-time images are studied. Further, an investigation is done on implementing the image processing algorithms in very large-scale integration (VLSI) hardware. As the image data are comparatively larger, the computational complexity and the memory requirement are more. From the study, the need for efficient computation of such image processing algorithms is realized. The efficient computation of image processing algorithms on hardware platforms, in particular on field programmable gate array (FPGA), is reviewed. As an experiment, the gamma-transformation technique used for image enhancement is realized. Initially, the prototype is modeled using MATLAB, and then it is implemented using an FPGA. K E Y W O R D Sfield programmable gate array, floating point multiplier, image enhancement INTRODUCTIONIn the modern digital world, all multimedia transactions require good-quality images. The visibility of an image depends on the illuminance and reflectance of the scene in the real world. The brightness of a point in an image is non-linear to the brightness of the same point in the real world.Generally, lighting condition determines the quality of an image. The images taken under poor lighting conditions may cause discomfort while viewing images.The image acquired can be degraded due to various reasons such as sensor level malfunction, low visibility, excessive exposure, foggy conditions, and so on. 1 To overcome the degradation, pre-processing is required to enhance the image. Image enhancement is the process of adjusting digital images so that the results are more suitable for display or further processing. It includes processes like deblurring, noise removal, filtering, and so on.Not all images will require the same image enhancement technique because there may be over-exposed regions in outdoor images that will need different treatment compared to indoor images. In literature, there are many algorithms proposed for image enhancement. The technique of being applied for enhancement depends on the input quality of the image. The quality needs to be assessed before applying any approach for a better perception of the image. A real-time implementation of image enhancement is hard to design using software because a large data set is required to represent an image. Since field programmable gate arrays (FPGAs) could exploit the spatial parallelism in image enhancement algorithms they are widely used for hardware implementation.Realizing the design on FPGAs, offer a compromise between the flexibility of general-purpose processors and the hardware-based speed of an integrated-circuit design. 2 Also, the programmable property of FPGA makes them a good choice for image processing applications, as the processing of the number of images also...

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FPGA-based implementation of basic image processing applications as low-cost IP core

Cited by 4 publications

References 0 publications

A computational study and meta-analysis of content based image retrieval

A computational study and meta-analysis of content based image retrieval

Fully Parallel Implementation of Otsu Automatic Image Thresholding Algorithm on FPGA

A study on VLSI implementation of image enhancement techniques

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