FPGA-based Optical Kerr Effect Emulator

Liu, Keren; Borjeson, Erik; Häger, Christian; Larsson-Edefors, Per

doi:10.1364/sppcom.2022.spth1i.2

Cited by 5 publications

(4 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…DSP slices are the main resource bottleneck. However, while the equalizer uses 79.72% of DSP slices, there is still enough room for further adding an on-board PMD-Kerr emulator [16], enabling a complete real-time test platform. Although the time-multiplexed computing units save considerable HW resources in, e.g., the linear BP layers, it is clear that the BP HW consumes more resources than the FP HW.…”

Section: Resultsmentioning

confidence: 99%

“…4) supplies the equalizer's VHDL model with input data cycle by cycle and the VHDL output is verified with system-level reference data. Forward Propagation (Inference): Running at 2 samples/symbol, the FP HW uses short time-domain filters [14,15] and a HW-friendly Kerr layer [16] to simplify implementation. Since all HW is pipelined for throughput, the FP HW needs to use delays implemented as shift registers (see Fig.…”

Section: Hardware (Hw) Implementationmentioning

confidence: 99%

See 1 more Smart Citation

FPGA Implementation of Multi-Layer Machine Learning Equalizer with On-Chip Training

Liu

Borjeson

Häger

et al. 2023

Optical Fiber Communication Conference (OFC) 2023

View full text Add to dashboard Cite

show abstract

Section: Resultsmentioning

confidence: 99%

Section: Hardware (Hw) Implementationmentioning

confidence: 99%

FPGA Implementation of Multi-Layer Machine Learning Equalizer with On-Chip Training

Liu

Borjeson

Häger

et al. 2023

Optical Fiber Communication Conference (OFC) 2023

View full text Add to dashboard Cite

show abstract

“…Recently, several field-programmable gate array (FPGA) implementations of ANN-based nonlinear equalizers have been demonstrated [9,10]. One implementation realized both the equalization and training stages within the same FPGA simultaneously [ 11]. In our research group, we demonstrated complex-valued ANN-based nonlinear equalizers, which showed improved learning speed and reduced computational complexity compared to a conventional real-valued ANN [12].…”

Section: Introductionmentioning

confidence: 99%

Overfitting Problem of ANN- and VSTF-Based Nonlinear Equalizers Trained on Repeated Random Bit Sequences

Ikuta,

Nakamura,

Nakamura

2024

IEICE Trans. Commun.

View full text Add to dashboard Cite

In this paper, we investigated the overfitting characteristics of nonlinear equalizers based on an artificial neural network (ANN) and the Volterra series transfer function (VSTF), which were designed to compensate for optical nonlinear waveform distortion in optical fiber communication systems. Linear waveform distortion caused by, e.g., chromatic dispersion (CD) is commonly compensated by linear equalizers using digital signal processing (DSP) in digital coherent receivers. However, mitigation of nonlinear waveform distortion is considered to be one of the next important issues. An ANN-based nonlinear equalizer is one possible candidate for solving this problem. However, the risk of overfitting of ANNs is one obstacle in using the technology in practical applications. We evaluated and compared the overfitting of ANN-and conventional VSTFbased nonlinear equalizers used to compensate for optical nonlinear distortion. The equalizers were trained on repeated random bit sequences (RRBSs), while varying the length of the bit sequences. When the number of hidden-layer units of the ANN was as large as 100 or 1000, the overfitting characteristics were comparable to those of the VSTF. However, when the number of hidden-layer units was 10, which is usually enough to compensate for optical nonlinear distortion, the overfitting was weaker than that of the VSTF. Furthermore, we confirmed that even commonly used finite impulse response (Fl R) filters showed overfitting to the RRBS when the length of the RRBS was equal to or shorter than the length of the tapped delay line of the filters. Conversely, when the RRBS used for the training was sufficiently longer than the tapped delay line, the overfitting could be suppressed, even when using an ANN-based nonlinear equalizer with 10 hidden-layer units.

show abstract

“…In contrast to most previous works [6]- [8], we do not only propose an optimized implementation of the ANN's forward pass (FP) but also tackle the challenges of implementing the backpropagation algorithm on the FPGA, which enables online retraining on the edge device itself, to adapt for varying channel conditions. A related approach is also presented in [9], but contrary to our work their model is based on the split-step solution of the Manakov-PMD equation instead of an ANN, thus it is not channel-agnostic. Further, it is trained in a supervised way.…”

Section: Introductionmentioning

confidence: 99%

FPGA-based Trainable Autoencoder for Communication Systems

Ney

Dörner

Herrmann

et al. 2022

Proceedings of the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

View full text Add to dashboard Cite

In recent years, communication engineers put strong emphasis on artificial neural network (ANN)-based algorithms with the aim of increasing the flexibility and autonomy of the system and its components. In this context, unsupervised training is of special interest as it enables adaptation without the overhead of transmitting pilot symbols. In this work, we present a novel ANN-based, unsupervised equalizer and its trainable field programmable gate array (FPGA) implementation. We demonstrate that our custom loss function allows the ANN to adapt for varying channel conditions, approaching the performance of a supervised baseline. Furthermore, as a first step towards a practical communication system, we design an efficient FPGA implementation of our proposed algorithm, which achieves a throughput in the order of Gbit/s, outperforming a high-performance GPU by a large margin.

show abstract

FPGA-based Optical Kerr Effect Emulator

Abstract: We propose a digital emulator of the optical Kerr effect, suitable for FPGA implementation. In addition, we study a combined PMD and Kerr emulator implementation with respect to DSP hardware aspects such as fixed-point performance.

Cited by 5 publications

References 5 publications

FPGA Implementation of Multi-Layer Machine Learning Equalizer with On-Chip Training

FPGA Implementation of Multi-Layer Machine Learning Equalizer with On-Chip Training

Overfitting Problem of ANN- and VSTF-Based Nonlinear Equalizers Trained on Repeated Random Bit Sequences

FPGA-based Trainable Autoencoder for Communication Systems

Contact Info

Product

Resources

About