2008 Second ACM/IEEE International Conference on Distributed Smart Cameras 2008
DOI: 10.1109/icdsc.2008.4635720
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FPGA-based Smart Camera for 3D wavelet-based image segmentation

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Cited by 15 publications
(6 citation statements)
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“…First, There were few f eatures extracted in the copy-move algorithm from some of the images in the dataset using our 2 feature extraction methods; SIFT and SURF. One proposed solution can be using another feature extraction as block-based methods such as DCT [24] or DWT [3]. Also, our algorithm depends on dividing the images into blocks in the copy-move detection, however some objects can be divided between multiple blocks which can cause negatively affects the matching point step that compares the features of the blocks to one another.…”
Section: Discussionmentioning
confidence: 99%
“…First, There were few f eatures extracted in the copy-move algorithm from some of the images in the dataset using our 2 feature extraction methods; SIFT and SURF. One proposed solution can be using another feature extraction as block-based methods such as DCT [24] or DWT [3]. Also, our algorithm depends on dividing the images into blocks in the copy-move detection, however some objects can be divided between multiple blocks which can cause negatively affects the matching point step that compares the features of the blocks to one another.…”
Section: Discussionmentioning
confidence: 99%
“…Temiz et al [6] used the rectification of the video frames to eliminate the perspective effect and then they used the optical flow [8] to estimate the vehicle speed, which is close to [24]. In [13] vehicle path estimated using accumulated ROI based on 3D wavelet transform. Yik [7] proposed a system that is based on Capturing information regarding the object of interest, this required the author to filter the right scene from the captured data frame sets and then applying the correct corresponding filters which are median filters.…”
Section: Literature Reviewmentioning
confidence: 99%
“…Despite its complexity, there has been an interest in 3-D DWT implementation on various platforms. Existing survey exhibits that the research can be classified into three categories: architecture development [63][64][65] , architecture with FPGA implementation [9], [10], [66][67][68], and finally architecture that has been implemented on other silicon platforms [69]. Since the aim and contribution of this work are on the reconfigurable architecture, the reviews and discussions will be focused on FPGA-based implementation only.…”
Section: Transform (Dct) and 3-d Discrete Fourier Transform (Dft) Exmentioning
confidence: 99%
“…Furthermore, the design consumes 63% of slice utilisation, and the maximum operating frequency is 100 MHz. Table 2.3 summarises the existing FPGA implementations of 3-D DWT [9], [66][67][68], in terms of FPGA devices, filter that has been used, as well as the design parameters of area and maximum frequency. …”
Section: Reconfigurable Architectures 39mentioning
confidence: 99%