FPGA implementation of extreme learning machine system for classification

Yeam, Tan Chong; Ismail, Nordinah; Mashiko, Kunihiro; Matsuzaki, Takanori

doi:10.1109/tencon.2017.8228163

Cited by 17 publications

(7 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…FPGA implementations are recent entrant into this area due to its reconfigurability. In [17], [18], they propose an efficient decomposition method to accelerate the computation of the pseudo-inverse for the hidden layer output matrix. In [19], the properties of random networks and hard-limiter activation functions are exploited to implement ELM on FPGA.…”

Section: Related Work For Elm Hardware Implementationmentioning

confidence: 99%

An Arbitrarily Reconfigurable Extreme Learning Machine Inference Engine for Robust ECG Anomaly Detection

Chuang

Chen

et al. 2021

IEEE Open J. Circuits Syst.

View full text Add to dashboard Cite

Extreme learning machine (ELM) has shown to be an effective and low-power approach for real-time electrocardiography (ECG) anomaly detection. However, prior ELM inference chips are noise-prone and lacking in reconfigurability. In this article, we present an arbitrarily reconfigurable ELM inference engine fabricated in 40-nm CMOS technology for robust ECG anomaly detection. By combining Adaptive boosting (Adaboost) and Eigenspace denoising with ELM (AE-ELM), robust classification under noisy conditions is achieved and saves the number of required multiplications by 95.9%. For chip implementation, a reconfigurable VLSI architecture is designed to support arbitrary complexity of AE-ELM, accounting for dynamic change in application requirements. On the other hand, we propose to construct the input weight matrix of ELM as a Bernoulli random matrix, which further reduces the number of multiplications by 55.2%. For real-time detection, parallel computing is exploited to reduce the latency by up to 86.8%. Overall, the 0.21-mm 2 AE-ELM inference engine shows its robustness against noisy signals and achieves 1.83x AEE compared with the state-of-the-art ELM design. INDEX TERMS Adaptive boosting (Adaboost), eigenspace denoising, electrocardiography (ECG) anomaly detection, extreme learning machine (ELM), reconfigurable chip design.

show abstract

Section: Related Work For Elm Hardware Implementationmentioning

confidence: 99%

An Arbitrarily Reconfigurable Extreme Learning Machine Inference Engine for Robust ECG Anomaly Detection

Chuang

Chen

et al. 2021

IEEE Open J. Circuits Syst.

View full text Add to dashboard Cite

show abstract

“…Several papers on hardware implementation of ELM [28,29,30,31] have been reported since 2012. However, studies on that of OS-ELM have just started to be reported in the past few years.…”

Section: Hardware Implementation Of Os-elmmentioning

confidence: 99%

A Neural Network-Based On-device Learning Anomaly Detector for Edge Devices

Tsukada

Kondo

Matsutani

2020

IEEE Trans. Comput.

View full text Add to dashboard Cite

Semi-supervised anomaly detection is an approach to identify anomalies by modeling the distribution of normal data. Nowadays, backpropagation neural networks (i.e., BP-NNs) based approaches have been drawing attention because of their high generalization performance for a wide range of real-world data. In a typical application, such BP-NN-based models are iteratively optimized in server machines with a large amount of data gathered from edge devices. However, there are two issues in this framework: (1) BP-NNs' iterative optimization approach often takes too long a time to follow time-series changes of the distribution of normal data (i.e., concept drift), and (2) data transfers between the server machines and the edge devices have a risk to cause data breaches. To address these issues, we propose an ON-device sequential Learning semi-supervised Anomaly Detector called ONLAD and its FPGA-based IP core called ONLAD Core so that various kinds of resource-limited edge devices can use our approach. Experimental results show that ONLAD has favorable anomaly detection capability especially in an environment which simulates concept drift. Evaluations of ONLAD Core confirm that it can perform training and prediction computations faster than BP-NN-based software implementations by x1.95 ∼ x4.51 and x2.29 ∼ x4.73, respectively. We also demonstrate that our on-board implementation which integrates ONLAD Core works at x6.3 ∼ x25.4 lower power consumption while training computations are continuously executed.

show abstract

“…A very largescale integration (VLSI) architecture was the main target in [3,6]; the approach presented in [32] envisioned analog implementations and combined a tri-state activation function with an offline pruning procedure to limit the predictor complexity. The models proposed in [9,10,37,50] targeted FPGA implementations of the learning phase, either online or in batch mode. Conversely, Decherchi et al [7] and Ragusa et al [35] proposed a minimal implementation of the forward phase of RBNs, while [32,49] introduced an effective scheme to reduce the memory requirements of the eventual predictors.…”

Section: Comparison With Related Workmentioning

confidence: 99%

“…First, the proposed designs mostly rely on reconfigurable platforms such as field programmable gate arrays (FPGAs) [9,10,37,50], which may prove quite expensive. By contrast, implementations on micro-controllers or microcomputers have drawn limited attention, in spite of the fact that these devices best fit IoT applications and remarkably shrink the time-to-market of commercial products [1,17].…”

Section: Introductionmentioning

confidence: 99%

Random-based networks with dropout for embedded systems

Ragusa

Gianoglio

Zunino

et al. 2020

Neural Comput & Applic

View full text Add to dashboard Cite

Random-based learning paradigms exhibit efficient training algorithms and remarkable generalization performances. However, the computational cost of the training procedure scales with the cube of the number of hidden neurons. The paper presents a novel training procedure for random-based neural networks, which combines ensemble techniques and dropout regularization. This limits the computational complexity of the training phase without affecting classification performance significantly; the method best fits Internet of Things (IoT) applications. In the training algorithm, one first generates a pool of random neurons; then, an ensemble of independent sub-networks (each including a fraction of the original pool) is trained; finally, the sub-networks are integrated into one classifier. The experimental validation compared the proposed approach with state-of-the-art solutions, by taking into account both generalization performance and computational complexity. To verify the effectiveness in IoT applications, the training procedures were deployed on a pair of commercially available embedded devices. The results showed that the proposed approach overall improved accuracy, with a minor degradation in performance in a few cases. When considering embedded implementations as compared with conventional architectures, the speedup of the proposed method scored up to 20× in IoT devices.

show abstract

FPGA implementation of extreme learning machine system for classification

Cited by 17 publications

References 11 publications

An Arbitrarily Reconfigurable Extreme Learning Machine Inference Engine for Robust ECG Anomaly Detection

An Arbitrarily Reconfigurable Extreme Learning Machine Inference Engine for Robust ECG Anomaly Detection

A Neural Network-Based On-device Learning Anomaly Detector for Edge Devices

Random-based networks with dropout for embedded systems

Contact Info

Product

Resources

About