FPGA Implementation of Pipelined Blowfish Algorithm

Chatterjee, Swagata Roy; Majumder, Soham; Pramanik, Bodhisatta; Chakraborty, Mohuya

doi:10.1109/ised.2014.51

Cited by 9 publications

(1 citation statement)

References 4 publications

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“…The pipelined hardware architecture of the blowfish algorithm is shown in Figure 4. There are sixteen hardware module blocks are designed to execute each stage of iteration in parallel and among of which only first hardware module block operates on the input raw data and rest hardware module blocks operate on the computed output data from the previous module block [12]. The data path is controlled by a hardware control unit that in turn facilitate the work of each hardware module blocks in parallel with different sets of data at a time.…”

Section: Pipelined Hardware Architecture Of Blowfish Algorithmmentioning

confidence: 99%

A Comparative Analysis of Pipelined and Area Optimized Blowfish Algorithm in FPGA for embedded tiny Sensor Node

Chatterjee¹,

M²

2017

IJET

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Abstract-With the unprecedented growth of modern technology the need for protecting data has increased vehemently in wireless sensor network. This need is not only restricted to the military but also subsumes daily lives as well. Hence safeguarding of data in wireless sensor network is one of the leading fields of research in modern times. Area has been a major stumbling block faced while designing encryption algorithms on hardware for sensor network as it involves tiny sensor nodes. The Blowfish algorithm is one of the fastest block ciphers and may be an efficient alternative to the existing encryption algorithms like AES, DES, IDEA etc. In this paper, pipelined hardware architecture (for enhancement of the speed) and area-optimized hardware architecture (for minimization of the size) are both designed for Blowfish algorithm and a comparative performance analysis has been made to trade off between the space and time complexities for embedded tiny sensor node. The architectures were implemented by verilog which were synthesized, placed and routed in Spartan3e chip XC3s500e-5fg320 using ISE Design Suite 12. , a CRSN consists of tiny low power sensor nodes embedded into mobile phones that adapts to the changing environment of the existing cellular network by analyzing the RF surroundings and adjusting the spectrum use appropriately to send sensory data of explosive traces within a defined territory to the respective service provider, which in turn would inform the law and enforcement agency or Police to combat terrorism. The hardware implementation of any encryption scheme for this type of application requires crucial analysis between time and space complexity of the chosen algorithm for the additional embedded hardware and computational overhead which in turn affects the speed and size of respectively of the embedded tiny sensor nodes [4,5]. Smaller the size and higher the speed better is the performance with regard to portability and throughput respectively. The idea is to design hardware architecture for an encryption algorithm and analyze its space and time complexities. Several symmetric key algorithms are designed, among which DES, Triple DES, AES, Blowfish are widely used. Bruce Schneier designed blowfish in 1993 as a fast, free alternative to existing encryption algorithms [6,7]. Since then this algorithm has been used considerably, and it is slowly gaining acceptance as a strong encryption algorithm. The Blowfish algorithm based on Feistel Network consists of 64 bit input data where same algorithmic operations are performed in each iteration round, except last round and has many advantages. The iteration rounds are suitable and efficient for hardware implementation using simple operations like exclusive-OR and addition on 32 bit word. The relative strength of an encryption algorithm depends on the key length. Blowfish uses variable length (32-448 bits) key and it is less complex and provides higher speed as compared to other existing algorithms [8,9]. So it is suitable for CRSN applications which exchange...

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Section: Pipelined Hardware Architecture Of Blowfish Algorithmmentioning

confidence: 99%