FPGA implementation of spectral subtraction for automotive speech recognition

Abstract

The use of speech recognition in noisy automotive environments requires the application of speech enhancement algorithms to improve recognition performance. Deploying these enhancement techniques necessitates significant engineering to ensure algorithms are realisable in electronic hardware. This paper describes advances in porting the popular spectral subtraction algorithm to a Spartan-3A DSP field-programmable gate array (FPGA) device suitable for integration in automotive environments. Resource analysis shows the final design uses only 13% of the total available general logic resources making it suitable for integration with other in-car devices on a single FPGA. Speech recognition experiments have been used to verify the effectiveness of the FPGA implementation for in-car speech recognition in comparison with an equivalent floating-point implementation.

Real-time Hardware Feature Extraction with Embedded Signal Enhancement for Automatic Speech Recognition

“…With γ = 1, experiments using floating-point software (Whittington et al, 2009) have been used to determine the optimal value of β on part of the AVICAR database (Lee et al, 2004). It has been shown that maximum recognition accuracy can be obtained by setting β = 0.55 and that the performance is only marginally worse (approximately 0.1%) if we set β = 0.5.…”