Design of FPGA-based rapid prototype spectral subtraction for hands-free speech applications

Abstract

In this paper, the design of a FPGA-based rapid prototype for Short-Time Fourier Transform (STFT) based spectral subtraction for hands-free speech applications using Xilinx System Generator (XSG) tools without traditional HDL hand coding is presented. Initially, the concept of a dual-channel short-time spectral subtraction algorithm for removing the wideband background noise in a speech signal is introduced. The studied algorithm is developed in the system-level modeling simulator using MATLAB Simulink environment. For the digital hardware design, simple hardware architectures for data framing and overlapping algorithms are proposed by utilizing the basic DSP blocksets of the XSG library, and replaced in the simulation model. Finally, a complete simulation model of the FPGA-based short-time spectral subtraction algorithm using XSG is presented. The comparative performance evaluation based on simulation results and the summary of resource utilization are confirmed the implementation feasibility of the real-time FPGA-based short-time spectral subtraction algorithm for hands-free speech applications.

Efficient FPGA-Based Architecture of the Overlap-Add Method for Short-Time Fourier Analysis/Synthesis

“…The use of the embedded multipliers allowed the best calculation performance (133.905 MHz instead of 126.920 MHz). It can be noted, to the best of our knowledge, that only two approaches [10,12] that use Xilinx system generator have been proposed in the literature, but they were not sufficiently detailed to be implemented in the present study. Table 1.…”

“…STFT-based techniques have been implemented on Field Programmable Gate Array (FPGA) for speech enhancement [10][11][12][13], audio indexing [14], and feature extraction [15][16][17] using Xilinx System Generator (XSG). This high-level programming tool provides a library of SIMULINK blocks allowing bit and cycle accurate modeling for digital signal processing (DSP) functions.…”

Pipelined Architecture of Multi-Band Spectral Subtraction Algorithm for Speech Enhancement

“…Hardware implementation of this kind of algorithms is a difficult task that consists in finding a balance between complexity, efficiency and throughput of these algorithms. Architectures based on the spectral subtraction approach have been implemented on Field Programmable Gate Array (FPGA) devices [13][14][15][16][17][18][19]. However, these architectures perform a uniform spectral subtraction over the entire frequency band and, therefore, they do not efficiently suppress colored noise.…”