FPGA-Implemented Fractal Decoder with Forward Error Correction in Short-Reach Optical Interconnects

Abstract

Forward error correction (FEC) codes combined with high-order modulator formats, i.e., coded modulation (CM), are essential in optical communication networks to achieve highly efficient and reliable communication. The task of providing additional error control in the design of CM systems with high-performance requirements remains urgent. As an additional control of CM systems, we propose to use indivisible error detection codes based on a positional number system. In this work, we evaluated the indivisible code using the average probability method (APM) for the binary symmetric channel (BSC), which has the simplicity, versatility and reliability of the estimate, which is close to reality. The APM allows for evaluation and compares indivisible codes according to parameters of correct transmission, and detectable and undetectable errors. Indivisible codes allow for the end-to-end (E2E) control of the transmission and processing of information in digital systems and design devices with a regular structure and high speed. This study researched a fractal decoder device for additional error control, implemented in field-programmable gate array (FPGA) software with FEC for short-reach optical interconnects with multilevel pulse amplitude (PAM-M) modulated with Gray code mapping. Indivisible codes with natural redundancy require far fewer hardware costs to develop and implement encoding and decoding devices with a sufficiently high error detection efficiency. We achieved a reduction in hardware costs for a fractal decoder by using the fractal property of the indivisible code from 10% to 30% for different n while receiving the reciprocal of the golden ratio.

An efficient high throughput BCH module for multi-bits error correction mechanism on hardware platform

“…The work uses Peterson's algorithm for error correction concerning the SEC, DEC, and TED rather than the Berlekamp-Massey algorithm. Matsenko et al [26] present the FEC-based fractal decoder for short-reach optical interconnects on the FPGA platform. The Wavelength division multiplexed (WDM) based short-reach optical interconnects module is interleaved with a BCH+LDPC-based fractal decoder to analyze the ECCs.…”