Fractal video compression in OpenCL: An evaluation of CPUs, GPUs, and FPGAs as acceleration platforms

Chen, D.; Singh, Deshanand P.

doi:10.1109/aspdac.2013.6509612

Cited by 51 publications

(19 citation statements)

References 6 publications

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“…An architectural and programming model study on fractal video compression involving optimization of OpenCL on FPGA has been presented in [7] and provides a series of FPGA-based optimizations on FPGA before comparing the results with CPU and GPU for an optimized kernel. In [8], six benchmarks of the Rodinia suite are evaluated using OpenCL and FPGA-specific optimizations are performed on kernels optimized for GPU-like devices, achieving up to 3.4x better energy efficiency compared to GPUs.…”

Section: Introductionmentioning

confidence: 99%

Exploring Functional Acceleration of OpenCL on FPGAs and GPUs Through Platform-Independent Optimizations

Minhas

Woods

Karakonstantis

2018

Lecture Notes in Computer Science

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Abstract. OpenCL has been proposed as a means of accelerating functional computation using FPGA and GPU accelerators. Although it provides ease of programmability and code portability, questions remain about the performance portability and underlying vendor's compiler capabilities to generate efficient implementations without user-defined, platform specific optimizations. In this work, we systematically evaluate this by formalizing a design space exploration strategy using platformindependent micro-architectural and application-specific optimizations only. The optimizations are then applied across Altera FPGA, NVIDIA GPU and ARM Mali GPU platforms for three computing examples, namely matrix-matrix multiplication, binomial-tree option pricing and 3-dimensional finite difference time domain. Our strategy enables a fair comparison across platforms in terms of execution time and energy efficiency by using the same design effort. Our results indicate that FPGA provides better performance portability in terms of achieved percentage of device's peak performance (68%) compared to NVIDIA GPU (20%) and also achieves better energy efficiency (up to 1.4×) for some of the considered cases without requiring in-depth hardware design expertise.

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Section: Introductionmentioning

confidence: 99%

Exploring Functional Acceleration of OpenCL on FPGAs and GPUs Through Platform-Independent Optimizations

Minhas

Woods

Karakonstantis

2018

Lecture Notes in Computer Science

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“…Another high-level development environment is Xilinx's SDAccel [Wirbel 2014], which is designed for OpenCL applications targeting Xilinx FPGA-based accelerator cards [Guidi et al 2016] [Guidi et al 2016;Fifield et al 2016]. Intel released a development tool called Altera SDK for OpenCL [Chen and Singh 2012;Chen and Singh 2013;Czajkowski et al 2012b;Czajkowski et al 2012a], which is based on OpenCL standard version 1.0. This OpenCL approach seems very promising as it is not only supported by the major FPGA vendors, but also a major technology used for the programming of GPUs, with the corresponding programming environments and experience in the community.…”

Section: High-level Synthesis Approachesmentioning

confidence: 99%

FPGA-based Acceleration of FT Convolution for Pulsar Search Using OpenCL

Wang

Prabu

Sinnen

2018

ACM Trans. Reconfigurable Technol. Syst.

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The Square Kilometre Array (SKA) project will be the world largest radio telescope array. With its large number of antennas, the number of signals that need to be processed is dramatic. One important element of the SKA's Central Signal Processor package is pulsar search. This paper focuses on the FPGA-based acceleration of the Frequency-Domain Acceleration Search module, which is a part of SKA pulsar search engine. In this module, the frequency-domain input signals have to be processed by 85 Finite Impulse response (FIR) filters within a short period of limitation and for thousands of input arrays. Because of the large scale of the input length and FIR filter size, even high-end FPGA devices cannot parallelise the task completely. We start by investigating both time-domain FIR filter (TDFIR) and frequency-domain FIR filter (FDFIR) to tackle this task. We applied the overlap-add algorithm to split the coefficient array of TDFIR and the overlap-save algorithm to split the input signals of FDFIR. To achieve fast prototyping design, we employed OpenCL, which is a high-level FPGA development technique. The performance and power consumption are evaluated using multiple FPGA devices simultaneously and compared with GPU results, which is achieved by porting FPGA-based OpenCL kernels. The experimental evaluation shows that the FDFIR solution is very competitive in terms of performance, with a clear energy consumption advantage over the GPU solution.

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“…Finally the generated kernel is loaded onto an Altera FPGA using an OpenCL compatible hardware image. Various applications using OpenCL to program FPGA accelerators have been demonstrated, such as information filtering [31], Monte Carlo simulation [30], finite difference [32], particle simulations [32], and video compression [33].…”

Section: B Altera Openclmentioning

confidence: 99%

High-Level Language Tools for Reconfigurable Computing

Windh

Halstead

et al. 2015

Proc. IEEE

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| In the past decade or so we have witnessed a steadily increasing interest in FPGAs as hardware accelerators:they provide an excellent mid-point between the reprogrammability of software devices (CPUs, DSPs, and GPUs) and the performance and low energy consumption of ASICs. However, the programmability of FPGA-based accelerators remains one of the biggest obstacles to their wider adoption. Developing FPGA programs requires extensive familiarity with hardware design and experience with a tedious and complex tool chain.

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Fractal video compression in OpenCL: An evaluation of CPUs, GPUs, and FPGAs as acceleration platforms

Cited by 51 publications

References 6 publications

Exploring Functional Acceleration of OpenCL on FPGAs and GPUs Through Platform-Independent Optimizations

Exploring Functional Acceleration of OpenCL on FPGAs and GPUs Through Platform-Independent Optimizations

FPGA-based Acceleration of FT Convolution for Pulsar Search Using OpenCL

High-Level Language Tools for Reconfigurable Computing

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