Fractional-$N$ Phase-Locked-Loop-Based Frequency Synthesis: A Tutorial

Su, Pin-En; Pamarti, Sudhakar

doi:10.1109/tcsii.2009.2035258

Cited by 49 publications

(1 citation statement)

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“…In a fractional-N frequency synthesizer, the frequency division ratio is changed once every reference period according to a sequence of small integers F [n]. In an average sense, the division ratio can be fractional [2]. Modern fractional-N frequency synthesizers usually employ digital sigma-delta modulators (SDM) to generate F[n] and are referred to as sigma-delta fractional-N frequency synthesizers, as shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

The Design of a 5 GHz Programmable Frequency Divider for Fractional-N Frequency Synthesizer

Chen¹,

Tu²,

2011

AMR

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The design of a high speed programmable frequency divider for fractional-N frequency synthesizer is presented. The programmable divider consists of a divide-by-4/5 dual-modulus prescaler, a 5-bit programmable counter, and a 2-bit swallow counter. A new scheme of reload operation is adopted to reduce the propagation delay of the critical path. The triggering signal for the two counters is selected carefully to mitigate the timing requirement of the mode control signal. The divider is designed in 0.18 um CMOS process. Its division ratio (DR) covers the range from 12 to 127. Post-layout simulations show it can work up to 5 GHz under 1.8 V power supply, while consuming only 9 mW and occupying an area of about 0.06 mm2.

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Section: Introductionmentioning

confidence: 99%

The Design of a 5 GHz Programmable Frequency Divider for Fractional-N Frequency Synthesizer

Chen¹,

Tu²,

2011

AMR

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Optimal design of both multi‐input multi‐output loop filter and multi‐input single‐output reconstruction filter of sigma delta modulator

Miao

Ling

Dam

2022

Circuit Theory & Apps

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This paper considers a sigma delta modulator (SDM) with the outputs of the quantizers directly fedback to the inputs of the loop filter without being subtracted from the input sequence. The design of the multi‐input multi‐output (MIMO) loop filter is formulated as an optimization problem. In particular, the sum of the inner products between the elements in the signal transfer function (STF) and the corresponding elements in the noise transfer function (NTF) of the SDM is minimized. The constraints of the optimization problem are defined based on the specifications on the maximum absolute difference between the magnitude response of the designed STF and that of the desirable STF as well as that between the magnitude response of the designed NTF and that of the desirable NTF of the SDM. Similarly, the design of the multi‐input single‐output (MISO) reconstruction filter is also formulated as an optimization problem. In particular, the sum of the total absolute difference between the designed magnitude response of the reconstruction filter and the desirable magnitude response of the STF of the SDM is minimized. The constraint of the problem is defined based on the specification on maximum absolute difference between the designed magnitude response of the reconstruction filter and the desirable magnitude response of the STF of the SDM. In this paper, the genetic algorithm is employed to find a near global solution of the formulated optimization problems. In order to reduce the required computational power, the matrix inversion lemma is applied. The computer numerical simulation results show that the SDM designed by our proposed method outperforms the SDMs designed by the Matlab function in terms of the signal to noise ratio (SNR) performance.

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Frequency-Hopping Systems

Torrieri¹

2011

Principles of Spread-Spectrum Communication Systems

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Fractional-$N$ Phase-Locked-Loop-Based Frequency Synthesis: A Tutorial

Abstract: The fundamentals and state of the art in fractional-N phase-locked-loop (PLL)-based frequency synthesis are reviewed. Particular emphasis is placed on delta-sigma fractional-N PLLs and quantization noise and fractional spur suppression techniques for wide-bandwidth applications.

Cited by 49 publications

References 36 publications

The Design of a 5 GHz Programmable Frequency Divider for Fractional-N Frequency Synthesizer

The Design of a 5 GHz Programmable Frequency Divider for Fractional-N Frequency Synthesizer

Optimal design of both multi‐input multi‐output loop filter and multi‐input single‐output reconstruction filter of sigma delta modulator

Frequency-Hopping Systems

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