Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range

Abstract

This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller capacitors and current buffers are implemented within the amplifier scheme to push the non-dominant poles to high frequencies for small to medium load capacitors. A small resistor is also shared between the two pathways to improve the stability regardless of the load capacitor. A serial R-C branch is then added to extend the lower limit of load drive capability to small load capacitors. Gain margin is, for the first time in literature, analytically evaluated and included in the design phase. A prototype of the proposed amplifier is fabricated in 65-nm CMOS process with active area of 0.0017 mm 2 and 1.15 pF total compensation capacitance. It can drive the load capacitor range from 200 pF to 100 nF, while drawing a quiescent current of 7.4 µA from a 1.2-V input voltage supply. A unity-gain frequency of 1.67 MHz was measured with an average slew-rate of 1.31 V/µs, when the proposed amplifier is wired in unity-gain configuration to drive a 500-pF load capacitor.

A 29.5 dBm OOB IIP3 TIA Based on a Two-Stage Pseudo-Differential OTA With R-C Compensation and Cascode Negative Resistance

“…The series of R-C has been frequently exploited for frequency compensation in previous literature but with different names, including local impedance attenuation (LIA) [16], [17], impedance adapting compensation (IAC) [18], and capacitors with equivalent series resistance (ESR) [19]. Despite having the same circuit form, they differ slightly in terms of philosophy or implementation.…”

Ladder-Type Gm -C Filters With Improved Linearity

“…It is comprised of capacitors and transconductors [22], both of which can be realized efficiently in CMOS technology. Gm−C integrators are composed of Gm stages in an openloop formation, so their frequency response will not be compromised by the dominant poles of a frequency compensation network inserted for the stability of feedback amplifiers [23]- [27]. The bandwidth of a Gm−C filter can be tuned much more readily than their inductance-capacitor (LC) or active resistance-capacitor (RC) counterparts [28], [29], for the inductors and resistors cannot be realized efficiently in CMOS technology (with high quality factor and/or high accuracy).…”

Hybrid Cascode Frequency Compensation for Four-Stage OTAs Driving a Wide Range of C L

“…T HE continuous trend toward the scaling of MOS transistors has been followed by reducing the voltage supply (V DD ) to guarantee a safe operation under very low power constraints. Meanwhile, short-channel MOS devices suffer from reduced intrinsic gain [1], and traditional gain-boosting solutions like cascading have been progressively abandoned in low-voltage nano-scale bulk CMOS technologies [2]. Although FinFET technologies (i.e., technology nodes lower than 16 nm) exhibit sufficient intrinsic gain, the majority of commercial analog products are still fabricated with conventional higher than 32 nm bulk technologies.…”

“…Maintaining the loop stability is the main challenge of the feedback OTAs supporting a wide C L range [2], [5], [12]. Each stage adds a high-impendence node and, consequently, a dominant pole in the transfer function which potentially depends on the loading conditions, so keeping the OTA stable over a broad C L range entails a carefully designed compensation network.…”

“…Capacitor-free compensation strategies have been also reported at the cost of inferior power efficiency relative to the capacitor-based solutions [26], [27]. Among the possible ways to realize a stable three-stage OTA, hybrid-cascode frequency compensation [28], [29] was originally developed from the idea of Miller compensation employing current buffers [23], [24], and proved to be very efficient especially when combined to the local RC network for achieving a wide C L drivability range [2]. According to the original strategy, the Miller capacitor is split into equal fractions, and each fraction is applied to build up a unilateral feedback pathway to the first stage through a current buffer.…”