Frequency dependent TDDB behaviors and its reliability qualification in 32nm high-k/metal gate CMOSFETs

Abstract

The TDDB failure mechanism of high-k dielectric/metal gate (HK/MG) CMOSFETs on DC and AC stress conditions are investigated in comparison to poly-Si/SiON. All devices under unipolar AC stress exhibit longer failure time (t bd ) as frequency increases. In case of HK/MG, the SILC behavior has been attributed to the bulk transient charge trapping by pre-existing defects in HK. Since trapped charges in HK can easily be detrapped once a relaxation bias is applied, t bd is increased as frequency becomes higher. Unlike unipolar AC bias condition, HK/MG nMOSFETs with bipolar AC stress exhibit shorter t bd than with DC at a lower frequency. This is attributed to hole trapping into IL as V g is at the gate injection bias since HK/MG stack has higher probability of electron injection than poly-Si/SiON due to relatively lower barrier height. However, bipolar AC TDDB in high frequency shows longer t bd than DC TDDB because of lack of time to generate enough holes in the IL. In bipolar AC bias condition, the higher power-law time exponent (n) appears because G m degradation by hole generation is aggravated at the gate injection bias in nMOSFET, while pMOSFET SILC is generated by bulk charge trapping at the substrate injection bias.

Frequency dependence of TDDB & PBTI with OTF monitoring methodology in high-k/metal gate stacks

“…So, by comparing the effect of AC/DC stress with and without interruption (Figure7), the TBD increases when the frequency becomes higher, as already reported [4]. Meanwhile, it is noticed that the frequency effect is even higher than estimated with sense methodology.…”

“…On the other hand, trapping effect on TDDB may also be analyzed [1][2][3][4]. In this respect, Fast PBTI measurements are performed under similar conditions as TDDB ( Figure 10).…”

“…In this respect, the recent investigations on TDDB AC/DC effect are performed under CVS with interruption for parameters measurement [1][2][3][4]. Nevertheless, while comparing CVS with and without interruption, a clear effect of stress interruption is evidenced on TBD ( Figure 1).…”

“…Nowadays, the AC/DC effect study on Time Dependent Dielectric Breakdown (TDDB) in high-k/Metal gate based technology is performed under interrupted stress [1][2][3][4]. However, TDDB distribution and voltage acceleration are found to strongly depend on stress waveforms and stress interruption, which may induce assessment errors [5].…”

“…In this work, AC TDDB dependences on frequency are presented using the new methodology. Moreover, since many studies were only performed using a 50% duty cycle [1][2][3][4], we also investigate the effect of AC stress with different duty cycles on TDDB. Finally, the origin of the AC/DC effect on TDDB is discussed using current vs time traces analysis, and performing an extensive PBTI study using fast measurements [7].…”