1997
DOI: 10.1007/s005420050068
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Fusion bonding of rough surfaces with polishing technique for silicon micromachining

Abstract: Surface roughness is one of the crucial factors in silicon fusion bonding. Due to the enhanced surface roughness, it is almost impossible to bond wafers after KOH etching. This also applies when wafers are heavily doped, have a thick LPCVD silicon nitride layer on top or have a LPCVD polysilicon layer of poor quality. It has been demonstrated that these wafers bond spontaneously after a very brief chemical mechanical polishing step. An adhesion parameter, that comprises of both the mechanical and chemical prop… Show more

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Cited by 34 publications
(24 citation statements)
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“…Surface impurities seem to be ubiquitous in LPCVD SiN films. Surface roughness of untreated LPCVD SiN has found to be in the range of 0.3 -3 nm [42,44]. Hence, surface roughness can become a significant fraction of the total SiN thin film thickness.…”
Section: Arxiv:14056115v2 [Cond-matmes-hall] 18 Jun 2014mentioning
confidence: 99%
“…Surface impurities seem to be ubiquitous in LPCVD SiN films. Surface roughness of untreated LPCVD SiN has found to be in the range of 0.3 -3 nm [42,44]. Hence, surface roughness can become a significant fraction of the total SiN thin film thickness.…”
Section: Arxiv:14056115v2 [Cond-matmes-hall] 18 Jun 2014mentioning
confidence: 99%
“…CMP was carried out with an PRES1 E460 polishing machine which has a single polisher. Using various polishing pads and slurries, the surface roughnesses of different levels can be obtained [14]. Wet chemical etching processes, such as HF etching and KOH etching, were also used in the modification of wafer surfaces.…”
Section: Experimental and Resultsmentioning
confidence: 99%
“…To enable direct bonding between PECVD SiO and Si, a CMP process on the PECVD SiO layer surface is necessary [19]. Fig.…”
Section: Chemical Mechanical Polishingmentioning
confidence: 99%